@@ -269,10 +269,9 @@ namespace {
269269 bool IfConvertForkedDiamond (BBInfo &BBI, IfcvtKind Kind,
270270 unsigned NumDups1, unsigned NumDups2,
271271 bool TClobbers, bool FClobbers);
272- void PredicateBlock (BBInfo &BBI,
273- MachineBasicBlock::iterator E,
272+ void PredicateBlock (BBInfo &BBI, MachineBasicBlock::iterator E,
274273 SmallVectorImpl<MachineOperand> &Cond,
275- SmallSet<MCPhysReg , 4 > *LaterRedefs = nullptr );
274+ SmallSet<MCRegister , 4 > *LaterRedefs = nullptr );
276275 void CopyAndPredicateBlock (BBInfo &ToBBI, BBInfo &FromBBI,
277276 SmallVectorImpl<MachineOperand> &Cond,
278277 bool IgnoreBr = false );
@@ -1926,13 +1925,13 @@ bool IfConverter::IfConvertDiamondCommon(
19261925 // generate:
19271926 // sub r0, r1, #1
19281927 // addne r0, r1, #1
1929- SmallSet<MCPhysReg , 4 > RedefsByFalse;
1930- SmallSet<MCPhysReg , 4 > ExtUses;
1928+ SmallSet<MCRegister , 4 > RedefsByFalse;
1929+ SmallSet<MCRegister , 4 > ExtUses;
19311930 if (TII->isProfitableToUnpredicate (MBB1, MBB2)) {
19321931 for (const MachineInstr &FI : make_range (MBB2.begin (), DI2)) {
19331932 if (FI.isDebugInstr ())
19341933 continue ;
1935- SmallVector<MCPhysReg , 4 > Defs;
1934+ SmallVector<MCRegister , 4 > Defs;
19361935 for (const MachineOperand &MO : FI.operands ()) {
19371936 if (!MO.isReg ())
19381937 continue ;
@@ -1949,7 +1948,7 @@ bool IfConverter::IfConvertDiamondCommon(
19491948 }
19501949 }
19511950
1952- for (MCPhysReg Reg : Defs) {
1951+ for (MCRegister Reg : Defs) {
19531952 if (!ExtUses.count (Reg)) {
19541953 for (MCPhysReg SubReg : TRI->subregs_inclusive (Reg))
19551954 RedefsByFalse.insert (SubReg);
@@ -2094,7 +2093,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
20942093}
20952094
20962095static bool MaySpeculate (const MachineInstr &MI,
2097- SmallSet<MCPhysReg , 4 > &LaterRedefs) {
2096+ SmallSet<MCRegister , 4 > &LaterRedefs) {
20982097 bool SawStore = true ;
20992098 if (!MI.isSafeToMove (SawStore))
21002099 return false ;
@@ -2114,10 +2113,9 @@ static bool MaySpeculate(const MachineInstr &MI,
21142113
21152114// / Predicate instructions from the start of the block to the specified end with
21162115// / the specified condition.
2117- void IfConverter::PredicateBlock (BBInfo &BBI,
2118- MachineBasicBlock::iterator E,
2116+ void IfConverter::PredicateBlock (BBInfo &BBI, MachineBasicBlock::iterator E,
21192117 SmallVectorImpl<MachineOperand> &Cond,
2120- SmallSet<MCPhysReg , 4 > *LaterRedefs) {
2118+ SmallSet<MCRegister , 4 > *LaterRedefs) {
21212119 bool AnyUnpred = false ;
21222120 bool MaySpec = LaterRedefs != nullptr ;
21232121 for (MachineInstr &I : make_range (BBI.BB ->begin (), E)) {
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