fix merge and test issues

Author: joaosaffran

llvm/lib/Target/DirectX/DXILRootSignature.cpp

@@ -391,14 +391,13 @@ static bool verifyDescriptorRangeFlag(uint32_t Version, uint32_t Type,
       Mask |= FlagT::DATA_STATIC;
       Mask |= FlagT::DATA_STATIC_WHILE_SET_AT_EXECUTE;
     }
-
-    if (!IsSampler)
-      return (Flags & ~Mask) == FlagT::NONE;
-    return false;
+    return (Flags & ~Mask) == FlagT::NONE;
   }
 
   // When no descriptor flag is set, any data flag is allowed.
-  return (Flags & ~DataFlags) == FlagT::NONE;
+  if (!IsSampler)
+    return (Flags & ~DataFlags) == FlagT::NONE;
+  return (Flags & ~FlagT::NONE) == FlagT::NONE;
 }
 
 static bool validate(LLVMContext *Ctx, const mcdxbc::RootSignatureDesc &RSD) {

llvm/test/CodeGen/DirectX/ContainerData/RootSignature-DescriptorTable-AllValidFlagCombinations.ll

@@ -12,7 +12,7 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 !dx.rootsignatures = !{!2} ; list of function/root signature pairs
 !2 = !{ ptr @main, !3, i32 2 } ; function, root signature
 !3 = !{ !5 } ; list of root signature elements
-!5 = !{ !"DescriptorTable", i32 0, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15, !16, !17, !18, !19, !20 }
+!5 = !{ !"DescriptorTable", i32 0, !6, !8, !9, !10, !11, !12, !13, !14, !15, !16, !17, !18, !19, !20 }
 
 ; typedef enum D3D12_DESCRIPTOR_RANGE_FLAGS {
 ;   NONE = 0,
@@ -25,14 +25,12 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 
 ;0
 !6 = !{ !"Sampler", i32 1, i32 0, i32 1, i32 -1, i32 0 }
-;DATA_VOLATILE
-!7 = !{ !"Sampler", i32 1, i32 0, i32 2, i32 -1, i32 2 }
-;DATA_STATIC_WHILE_SET_AT_EXECUTE
-!8 = !{ !"Sampler", i32 1, i32 0, i32 3, i32 -1, i32 4 }
-;DATA_STATIC
-!9 = !{ !"Sampler", i32 1, i32 0, i32 4, i32 -1, i32 8 }
+;DESCRIPTORS_VOLATILE
+!8 = !{ !"Sampler", i32 1, i32 0, i32 3, i32 -1, i32 1 }
+;DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS
+!9 = !{ !"Sampler", i32 1, i32 0, i32 4, i32 -1, i32 65536 }
 ;0
-!10 = !{ !"SRV", i32 1, i32 0, i32 5, i32 -1, i32 0 }
+!10 = !{ !"SRV", i32 1, i32 0, i32 5, i32 -1, i32 1 }
 ;DESCRIPTORS_VOLATILE
 !11 = !{ !"UAV", i32 5, i32 1, i32 6, i32 5, i32 1 }
 ;DATA_VOLATILE
@@ -54,111 +52,106 @@ attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 ;DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS | DATA_STATIC_WHILE_SET_AT_EXECUTE
 !20 = !{ !"UAV", i32 5, i32 1, i32 15, i32 5, i32 65540 }
 
-; DXC:  - Name:            RTS0
-; DXC-NEXT:    Size:            404
-; DXC-NEXT:    RootSignature:
-; DXC-NEXT:      Version:         2
-; DXC-NEXT:      NumRootParameters: 1 
-; DXC-NEXT:      RootParametersOffset: 24 
-; DXC-NEXT:      NumStaticSamplers: 0
-; DXC-NEXT:      StaticSamplersOffset: 0
-; DXC-NEXT:      Parameters:
-; DXC-NEXT:        - ParameterType:   0
-; DXC-NEXT:          ShaderVisibility: 0
-; DXC-NEXT:          Table:
-; DXC-NEXT:            NumRanges:       15
-; DXC-NEXT:            RangesOffset:    44
-; DXC-NEXT:            Ranges:
-; DXC-NEXT:              - RangeType:       3
-; DXC-NEXT:                NumDescriptors:  1
-; DXC-NEXT:                BaseShaderRegister: 0
-; DXC-NEXT:                RegisterSpace:   1
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
-; DXC-NEXT:              - RangeType:       3
-; DXC-NEXT:                NumDescriptors:  1
-; DXC-NEXT:                BaseShaderRegister: 0
-; DXC-NEXT:                RegisterSpace:   2
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
-; DXC-NEXT:                DATA_VOLATILE:   true
-; DXC-NEXT:              - RangeType:       3
-; DXC-NEXT:                NumDescriptors:  1
-; DXC-NEXT:                BaseShaderRegister: 0
-; DXC-NEXT:                RegisterSpace:   3
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
-; DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
-; DXC-NEXT:              - RangeType:       3
-; DXC-NEXT:                NumDescriptors:  1
-; DXC-NEXT:                BaseShaderRegister: 0
-; DXC-NEXT:                RegisterSpace:   4
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
-; DXC-NEXT:                DATA_STATIC:     true
-; DXC-NEXT:              - RangeType:       0
-; DXC-NEXT:                NumDescriptors:  1
-; DXC-NEXT:                BaseShaderRegister: 0
-; DXC-NEXT:                RegisterSpace:   5
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
-; DXC-NEXT:              - RangeType:       1
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   6
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DESCRIPTORS_VOLATILE: true
-; DXC-NEXT:              - RangeType:       2
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   7
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_VOLATILE:   true
-; DXC-NEXT:              - RangeType:       0
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   8
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_STATIC:     true
-; DXC-NEXT:              - RangeType:       1
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   9
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
-; DXC-NEXT:              - RangeType:       2
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   10
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DESCRIPTORS_VOLATILE: true
-; DXC-NEXT:                DATA_VOLATILE:   true
-; DXC-NEXT:              - RangeType:       0
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   11
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DESCRIPTORS_VOLATILE: true
-; DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
-; DXC-NEXT:              - RangeType:       1
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   12
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
-; DXC-NEXT:              - RangeType:       2
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   13
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_VOLATILE:   true
-; DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
-; DXC-NEXT:              - RangeType:       0
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   14
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_STATIC:     true
-; DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
-; DXC-NEXT:              - RangeType:       1
-; DXC-NEXT:                NumDescriptors:  5
-; DXC-NEXT:                BaseShaderRegister: 1
-; DXC-NEXT:                RegisterSpace:   15
-; DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
-; DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
-; DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
+;DXC:- Name:            RTS0
+;DXC-NEXT:    Size:            380
+;DXC-NEXT:    RootSignature:
+;DXC-NEXT:      Version:         2
+;DXC-NEXT:      NumRootParameters: 1
+;DXC-NEXT:      RootParametersOffset: 24
+;DXC-NEXT:      NumStaticSamplers: 0
+;DXC-NEXT:      StaticSamplersOffset: 0
+;DXC-NEXT:      Parameters:
+;DXC-NEXT:        - ParameterType:   0
+;DXC-NEXT:          ShaderVisibility: 0
+;DXC-NEXT:          Table:
+;DXC-NEXT:            NumRanges:       14
+;DXC-NEXT:            RangesOffset:    44
+;DXC-NEXT:            Ranges:
+;DXC-NEXT:              - RangeType:       3
+;DXC-NEXT:                NumDescriptors:  1
+;DXC-NEXT:                BaseShaderRegister: 0
+;DXC-NEXT:                RegisterSpace:   1
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
+;DXC-NEXT:              - RangeType:       3
+;DXC-NEXT:                NumDescriptors:  1
+;DXC-NEXT:                BaseShaderRegister: 0
+;DXC-NEXT:                RegisterSpace:   3
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
+;DXC-NEXT:                DESCRIPTORS_VOLATILE: true
+;DXC-NEXT:              - RangeType:       3
+;DXC-NEXT:                NumDescriptors:  1
+;DXC-NEXT:                BaseShaderRegister: 0
+;DXC-NEXT:                RegisterSpace:   4
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
+;DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
+;DXC-NEXT:              - RangeType:       0
+;DXC-NEXT:                NumDescriptors:  1
+;DXC-NEXT:                BaseShaderRegister: 0
+;DXC-NEXT:                RegisterSpace:   5
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 4294967295
+;DXC-NEXT:                DESCRIPTORS_VOLATILE: true
+;DXC-NEXT:              - RangeType:       1
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   6
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DESCRIPTORS_VOLATILE: true
+;DXC-NEXT:              - RangeType:       2
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   7
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_VOLATILE:   true
+;DXC-NEXT:              - RangeType:       0
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   8
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_STATIC:     true
+;DXC-NEXT:              - RangeType:       1
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   9
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
+;DXC-NEXT:              - RangeType:       2
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   10
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DESCRIPTORS_VOLATILE: true
+;DXC-NEXT:                DATA_VOLATILE:   true
+;DXC-NEXT:              - RangeType:       0
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   11
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DESCRIPTORS_VOLATILE: true
+;DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
+;DXC-NEXT:              - RangeType:       1
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   12
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
+;DXC-NEXT:              - RangeType:       2
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   13
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_VOLATILE:   true
+;DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
+;DXC-NEXT:              - RangeType:       0
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   14
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_STATIC:     true
+;DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true
+;DXC-NEXT:              - RangeType:       1
+;DXC-NEXT:                NumDescriptors:  5
+;DXC-NEXT:                BaseShaderRegister: 1
+;DXC-NEXT:                RegisterSpace:   15
+;DXC-NEXT:                OffsetInDescriptorsFromTableStart: 5
+;DXC-NEXT:                DATA_STATIC_WHILE_SET_AT_EXECUTE: true
+;DXC-NEXT:                DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS: true

llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Parameters.ll

@@ -11,7 +11,7 @@ entry:
 attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
 
 !dx.rootsignatures = !{!2} ; list of function/root signature pairs
-!2 = !{ ptr @main, !3, i32 2, i32 2 } ; function, root signature
+!2 = !{ ptr @main, !3, i32 2 } ; function, root signature
 !3 = !{ !4, !5, !6, !7 } ; list of root signature elements
 !4 = !{ !"RootFlags", i32 1 } ; 1 = allow_input_assembler_input_layout
 !5 = !{ !"RootConstants", i32 0, i32 1, i32 2, i32 3 }