@@ -361,26 +361,21 @@ void SPIRVModuleAnalysis::visitDecl(
361361 } else if (Opcode == SPIRV::OpFunction ||
362362 Opcode == SPIRV::OpFunctionParameter) {
363363 GReg = handleFunctionOrParameter (MF, MI, GlobalToGReg, IsFunDef);
364- } else if (Opcode == SPIRV::OpTypeStruct) {
364+ } else if (Opcode == SPIRV::OpTypeStruct ||
365+ Opcode == SPIRV::OpConstantComposite) {
365366 GReg = handleTypeDeclOrConstant (MI, SignatureToGReg);
366367 const MachineInstr *NextInstr = MI.getNextNode ();
367368 while (NextInstr &&
368- NextInstr->getOpcode () == SPIRV::OpTypeStructContinuedINTEL) {
369+ ((Opcode == SPIRV::OpTypeStruct &&
370+ NextInstr->getOpcode () == SPIRV::OpTypeStructContinuedINTEL) ||
371+ (Opcode == SPIRV::OpConstantComposite &&
372+ NextInstr->getOpcode () ==
373+ SPIRV::OpConstantCompositeContinuedINTEL))) {
369374 MCRegister Tmp = handleTypeDeclOrConstant (*NextInstr, SignatureToGReg);
370375 MAI.setRegisterAlias (MF, NextInstr->getOperand (0 ).getReg (), Tmp);
371376 MAI.setSkipEmission (NextInstr);
372377 NextInstr = NextInstr->getNextNode ();
373378 }
374- } else if (Opcode == SPIRV::OpConstantComposite) {
375- GReg = handleTypeDeclOrConstant (MI, SignatureToGReg);
376- const MachineInstr *NextInstr = MI.getNextNode ();
377- while (NextInstr && NextInstr->getOpcode () ==
378- SPIRV::OpConstantCompositeContinuedINTEL) {
379- Register Tmp = handleTypeDeclOrConstant (*NextInstr, SignatureToGReg);
380- MAI.setRegisterAlias (MF, NextInstr->getOperand (0 ).getReg (), Tmp);
381- MAI.setSkipEmission (NextInstr);
382- NextInstr = NextInstr->getNextNode ();
383- }
384379 } else if (TII->isTypeDeclInstr (MI) || TII->isConstantInstr (MI) ||
385380 TII->isInlineAsmDefInstr (MI)) {
386381 GReg = handleTypeDeclOrConstant (MI, SignatureToGReg);
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