[RISCV][DAGCombiner] Fix missed combines in combineOp_VLToVWOp_VL by updating users of new nodes

The previous implementation of combineOp_VLToVWOp_VL updated the DAG by
replacing old nodes with newly created widened nodes, but only added the new
node itself to the DAGCombiner worklist. Its users were not added, which
could cause the external DAGCombiner to miss opportunities to re-run combine
logic on dependent nodes.

This patch aligns the behavior of the helper's private worklist with the logic
used by DAGCombiner::Run when replacing nodes:
- Replace all uses of the old node with the new one.
- Add both the new node and all of its users to the worklist.
- Recursively delete unused nodes.

Although this duplicates part of the logic in DAGCombiner::Run, the private
worklist in combineOp_VLToVWOp_VL is currently necessary (see PR#168026 for
discussion). Splitting this logic into a common utility is desirable but left
for future cleanup.

This patch reduces behavioral discrepancies between the private worklist and
the external DAGCombiner worklist, eliminating missed combine cases.

Author: Kai Lin

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -18300,8 +18300,24 @@ static SDValue combineOp_VLToVWOp_VL(SDNode *N,
     }
   }
   for (std::pair<SDValue, SDValue> OldNewValues : ValuesToReplace) {
-    DAG.ReplaceAllUsesOfValueWith(OldNewValues.first, OldNewValues.second);
-    DCI.AddToWorklist(OldNewValues.second.getNode());
+    // This helper function do as what is done for RV in `DAGCombiner::Run`.
+    [&DAG, &DCI](SDNode *N, SDValue RV) -> void {
+      if (N->getNumValues() == RV->getNumValues())
+        DAG.ReplaceAllUsesWith(N, RV.getNode());
+      else {
+        assert(N->getValueType(0) == RV.getValueType() &&
+               N->getNumValues() == 1 && "Type mismatch");
+        DAG.ReplaceAllUsesWith(N, &RV);
+      }
+
+      if (RV.getOpcode() != ISD::EntryToken) {
+        DCI.AddToWorklist(RV.getNode());
+        for (SDNode *Node : RV.getNode()->users())
+          DCI.AddToWorklist(Node);
+      }
+
+      DCI.recursivelyDeleteUnusedNodes(N);
+    }(OldNewValues.first.getNode(), OldNewValues.second);
   }
   return InputRootReplacement;
 }

llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll

@@ -7,19 +7,16 @@ define void @matmul_min(<32 x i8>* %vptr, i8* %scalars, <32 x i16>* %acc0_ptr, <
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    li a4, 64
 ; CHECK-NEXT:    li a5, 32
-; CHECK-NEXT:    vsetvli zero, a4, e8, m4, ta, ma
-; CHECK-NEXT:    vle8.v v8, (a2)
 ; CHECK-NEXT:    vsetvli zero, a5, e8, m2, ta, ma
-; CHECK-NEXT:    vle8.v v20, (a0)
+; CHECK-NEXT:    vle8.v v16, (a0)
 ; CHECK-NEXT:    lb a0, 0(a1)
 ; CHECK-NEXT:    lb a1, 1(a1)
 ; CHECK-NEXT:    vsetvli zero, a4, e8, m4, ta, ma
+; CHECK-NEXT:    vle8.v v8, (a2)
 ; CHECK-NEXT:    vle8.v v12, (a3)
 ; CHECK-NEXT:    vsetvli zero, a5, e8, m2, ta, ma
-; CHECK-NEXT:    vwmacc.vx v8, a0, v20
-; CHECK-NEXT:    vwmul.vx v16, v20, a1
-; CHECK-NEXT:    vsetvli zero, zero, e16, m4, ta, ma
-; CHECK-NEXT:    vadd.vv v12, v16, v12
+; CHECK-NEXT:    vwmacc.vx v8, a0, v16
+; CHECK-NEXT:    vwmacc.vx v12, a1, v16
 ; CHECK-NEXT:    vsetvli zero, a4, e8, m4, ta, ma
 ; CHECK-NEXT:    vse8.v v8, (a2)
 ; CHECK-NEXT:    vse8.v v12, (a3)