[AA] Improve precision for monotonic atomic load/store operations

Author: Jin Huang

llvm/lib/Analysis/AliasAnalysis.cpp

@@ -421,25 +421,23 @@ ModRefInfo AAResults::getModRefInfo(const LoadInst *L,
                                     const MemoryLocation &Loc,
                                     AAQueryInfo &AAQI) {
   // Be conservative in the face of atomic.
-  if (isStrongerThan(L->getOrdering(), AtomicOrdering::Monotonic))
+  if (isStrongerThanMonotonic(L->getOrdering()))
     return ModRefInfo::ModRef;
 
-  // For Monotonic and unordered atomic loads, if the locations are not NoAlias,
-  // we must be conservative and return ModRef to prevent unsafe reordering of
-  // accesses to the same memory.
-  if (L->isAtomic()){
-    if (Loc.Ptr &&
-        alias(MemoryLocation::get(L), Loc, AAQI, L) != AliasResult::NoAlias)
-      return ModRefInfo::ModRef;
-  }
-
   // If the load address doesn't alias the given address, it doesn't read
   // or write the specified memory.
   if (Loc.Ptr) {
     AliasResult AR = alias(MemoryLocation::get(L), Loc, AAQI, L);
     if (AR == AliasResult::NoAlias)
       return ModRefInfo::NoModRef;
   }
+
+  assert(!isStrongerThanMonotonic(L->getOrdering()) &&
+         "Stronger atomic orderings should have been handled above!");
+
+  if (isStrongerThanUnordered(L->getOrdering()))
+    return ModRefInfo::ModRef;
+
   // Otherwise, a load just reads.
   return ModRefInfo::Ref;
 }
@@ -448,7 +446,7 @@ ModRefInfo AAResults::getModRefInfo(const StoreInst *S,
                                     const MemoryLocation &Loc,
                                     AAQueryInfo &AAQI) {
   // Be conservative in the face of atomic.
-  if (isStrongerThan(S->getOrdering(), AtomicOrdering::Monotonic))
+  if (isStrongerThanMonotonic(S->getOrdering()))
     return ModRefInfo::ModRef;
 
   if (Loc.Ptr) {
@@ -466,8 +464,14 @@ ModRefInfo AAResults::getModRefInfo(const StoreInst *S,
       return ModRefInfo::NoModRef;
   }
 
-  // Otherwise, a store just writes.
-  return ModRefInfo::ModRef;
+  assert(!isStrongerThanMonotonic(S->getOrdering()) &&
+         "Stronger atomic orderings should have been handled above!");
+
+  if (isStrongerThanUnordered(S->getOrdering()))
+    return ModRefInfo::ModRef;
+
+  // A store just writes.
+  return ModRefInfo::Mod;
 }
 
 ModRefInfo AAResults::getModRefInfo(const FenceInst *S,

llvm/test/Transforms/DeadStoreElimination/atomic-todo.ll

@@ -37,9 +37,21 @@ define void @test4() {
   ret void
 }
 
-; DSE unordered store overwriting non-atomic store (allowed)
+; DSE doesn't remove monotonic store.
 define void @test5() {
 ; CHECK-LABEL: @test5(
+; CHECK-NEXT:    store atomic i32 2, ptr @x monotonic, align 4
+; CHECK-NEXT:    store i32 1, ptr @x, align 4
+; CHECK-NEXT:    ret void
+;
+  store atomic i32 2, ptr @x monotonic, align 4
+  store i32 1, ptr @x
+  ret void
+}
+
+; DSE unordered store overwriting non-atomic store (allowed)
+define void @test6() {
+; CHECK-LABEL: @test6(
 ; CHECK-NEXT:    store atomic i32 1, ptr @x unordered, align 4
 ; CHECK-NEXT:    ret void
 ;
@@ -49,8 +61,8 @@ define void @test5() {
 }
 
 ; DSE no-op unordered atomic store (allowed)
-define void @test6() {
-; CHECK-LABEL: @test6(
+define void @test7() {
+; CHECK-LABEL: @test7(
 ; CHECK-NEXT:    ret void
 ;
   %x = load atomic i32, ptr @x unordered, align 4
@@ -60,8 +72,8 @@ define void @test6() {
 
 ; DSE seq_cst store (be conservative; DSE doesn't have infrastructure
 ; to reason about atomic operations).
-define void @test7() {
-; CHECK-LABEL: @test7(
+define void @test8() {
+; CHECK-LABEL: @test8(
 ; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
 ; CHECK-NEXT:    store atomic i32 0, ptr [[A]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
@@ -73,8 +85,8 @@ define void @test7() {
 
 ; DSE and seq_cst load (be conservative; DSE doesn't have infrastructure
 ; to reason about atomic operations).
-define i32 @test8() {
-; CHECK-LABEL: @test8(
+define i32 @test9() {
+; CHECK-LABEL: @test9(
 ; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
 ; CHECK-NEXT:    call void @randomop(ptr [[A]])
 ; CHECK-NEXT:    store i32 0, ptr [[A]], align 4
@@ -88,10 +100,35 @@ define i32 @test8() {
   ret i32 %x
 }
 
-; DSE across monotonic store (allowed as long as the eliminated store isUnordered)
-define void @test10() {
+; DSE across monotonic load (allowed if the monotonic load's address is NoAlias)
+define i32 @test10() {
 ; CHECK-LABEL: test10
 ; CHECK-NOT: store i32 0
+; CHECK: store i32 1
+  store i32 0, ptr @x
+  %x = load atomic i32, ptr @y monotonic, align 4
+  store i32 1, ptr @x
+  ret i32 %x
+}
+
+; DSE across monotonic load (blocked if the atomic load's address isn't NoAlias)
+define i32 @test11(ptr %ptr) {
+; CHECK-LABEL: @test11(
+; CHECK-NEXT:    store i32 0, ptr @x, align 4
+; CHECK-NEXT:    [[X:%.*]] = load atomic i32, ptr [[PTR:%.*]] monotonic, align 4
+; CHECK-NEXT:    store i32 1, ptr @x, align 4
+; CHECK-NEXT:    ret i32 [[X]]
+;
+  store i32 0, ptr @x
+  %x = load atomic i32, ptr %ptr monotonic, align 4
+  store i32 1, ptr @x
+  ret i32 %x
+}
+
+; DSE across monotonic store (allowed as long as the eliminated store isUnordered)
+define void @test12() {
+; CHECK-LABEL: test12
+; CHECK-NOT: store i32 0
 ; CHECK: store i32 1
   store i32 0, ptr @x
   store atomic i32 42, ptr @y monotonic, align 4
@@ -100,8 +137,8 @@ define void @test10() {
 }
 
 ; DSE across monotonic load (forbidden since the eliminated store is atomic)
-define i32 @test11() {
-; CHECK-LABEL: @test11(
+define i32 @test13() {
+; CHECK-LABEL: @test13(
 ; CHECK-NEXT:    store atomic i32 0, ptr @x monotonic, align 4
 ; CHECK-NEXT:    [[X:%.*]] = load atomic i32, ptr @y monotonic, align 4
 ; CHECK-NEXT:    store atomic i32 1, ptr @x monotonic, align 4
@@ -114,8 +151,8 @@ define i32 @test11() {
 }
 
 ; DSE across monotonic store (forbidden since the eliminated store is atomic)
-define void @test12() {
-; CHECK-LABEL: @test12(
+define void @test14() {
+; CHECK-LABEL: @test14(
 ; CHECK-NEXT:    store atomic i32 0, ptr @x monotonic, align 4
 ; CHECK-NEXT:    store atomic i32 42, ptr @y monotonic, align 4
 ; CHECK-NEXT:    store atomic i32 1, ptr @x monotonic, align 4