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[IR] Add llvm.modf intrinsic (#121948)
This adds the `llvm.modf` intrinsic, legalization, and lowering (mostly reusing the lowering for sincos and frexp). The `llvm.modf` intrinsic takes a floating-point value and returns both the integral and fractional parts (as a struct). ``` declare { float, float } @llvm.modf.f32(float %Val) declare { double, double } @llvm.modf.f64(double %Val) declare { x86_fp80, x86_fp80 } @llvm.modf.f80(x86_fp80 %Val) declare { fp128, fp128 } @llvm.modf.f128(fp128 %Val) declare { ppc_fp128, ppc_fp128 } @llvm.modf.ppcf128(ppc_fp128 %Val) declare { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> %Val) ``` This corresponds to the libm `modf` function but returns multiple values in a struct (rather than take output pointers), which makes it easier to vectorize.
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‎llvm/docs/LangRef.rst

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@@ -16122,6 +16122,63 @@ of the argument.
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When specified with the fast-math-flag 'afn', the result may be approximated
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using a less accurate calculation.
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'``llvm.modf.*``' Intrinsic
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Syntax:
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"""""""
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This is an overloaded intrinsic. You can use ``llvm.modf`` on any floating-point
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or vector of floating-point type. However, not all targets support all types.
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::
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declare { float, float } @llvm.modf.f32(float %Val)
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declare { double, double } @llvm.modf.f64(double %Val)
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declare { x86_fp80, x86_fp80 } @llvm.modf.f80(x86_fp80 %Val)
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declare { fp128, fp128 } @llvm.modf.f128(fp128 %Val)
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declare { ppc_fp128, ppc_fp128 } @llvm.modf.ppcf128(ppc_fp128 %Val)
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declare { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> %Val)
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Overview:
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"""""""""
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The '``llvm.modf.*``' intrinsics return the operand's integral and fractional
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parts.
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Arguments:
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""""""""""
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The argument is a :ref:`floating-point <t_floating>` value or
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:ref:`vector <t_vector>` of floating-point values. Returns two values matching
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the argument type in a struct.
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Semantics:
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""""""""""
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Return the same values as a corresponding libm '``modf``' function without
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trapping or setting ``errno``.
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The first result is the fractional part of the operand and the second result is
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the integral part of the operand. Both results have the same sign as the operand.
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Not including exceptional inputs (listed below), `llvm.modf.*` is semantically
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equivalent to:
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%fp = frem <fptype> %x, 1.0 ; Fractional part
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%ip = fsub <fptype> %x, %fp ; Integral part
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(assuming no floating-point precision errors)
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If the argument is a zero, returns a zero with the same sign for both the
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fractional and integral parts.
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If the argument is an infinity, returns a fractional part of zero with the same
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sign, and infinity with the same sign as the integral part.
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When specified with the fast-math-flag 'afn', the result may be approximated
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using a less accurate calculation.
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'``llvm.pow.*``' Intrinsic
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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‎llvm/include/llvm/CodeGen/BasicTTIImpl.h

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@@ -2101,6 +2101,9 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
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case Intrinsic::sincos:
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ISD = ISD::FSINCOS;
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break;
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case Intrinsic::modf:
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ISD = ISD::FMODF;
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break;
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case Intrinsic::tan:
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ISD = ISD::FTAN;
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break;

‎llvm/include/llvm/CodeGen/ISDOpcodes.h

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@@ -1058,6 +1058,10 @@ enum NodeType {
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/// FSINCOS - Compute both fsin and fcos as a single operation.
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FSINCOS,
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/// FMODF - Decomposes the operand into integral and fractional parts, each
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/// having the same type and sign as the operand.
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FMODF,
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/// Gets the current floating-point environment. The first operand is a token
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/// chain. The results are FP environment, represented by an integer value,
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/// and a token chain.

‎llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h

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@@ -66,6 +66,10 @@ Libcall getFREXP(EVT RetVT);
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/// UNKNOWN_LIBCALL if there is none.
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Libcall getFSINCOS(EVT RetVT);
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/// getMODF - Return the MODF_* value for the given types, or
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/// UNKNOWN_LIBCALL if there is none.
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Libcall getMODF(EVT RetVT);
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/// Return the SYNC_FETCH_AND_* value for the given opcode and type, or
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/// UNKNOWN_LIBCALL if there is none.
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Libcall getSYNC(unsigned Opc, MVT VT);

‎llvm/include/llvm/IR/Intrinsics.td

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@@ -1075,6 +1075,8 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable, IntrWillReturn] in {
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def int_roundeven : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
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def int_sincos : DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>],
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[llvm_anyfloat_ty]>;
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def int_modf : DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>],
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[llvm_anyfloat_ty]>;
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// Truncate a floating point number with a specific rounding mode
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def int_fptrunc_round : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],

‎llvm/include/llvm/IR/RuntimeLibcalls.def

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@@ -354,6 +354,11 @@ HANDLE_LIBCALL(FREXP_F64, "frexp")
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HANDLE_LIBCALL(FREXP_F80, "frexpl")
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HANDLE_LIBCALL(FREXP_F128, "frexpl")
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HANDLE_LIBCALL(FREXP_PPCF128, "frexpl")
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HANDLE_LIBCALL(MODF_F32, "modff")
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HANDLE_LIBCALL(MODF_F64, "modf")
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HANDLE_LIBCALL(MODF_F80, "modfl")
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HANDLE_LIBCALL(MODF_F128, "modfl")
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HANDLE_LIBCALL(MODF_PPCF128, "modfl")
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// Floating point environment
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HANDLE_LIBCALL(FEGETENV, "fegetenv")

‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

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@@ -4609,12 +4609,15 @@ void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
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ExpandFPLibCall(Node, RTLIB::LDEXP_F32, RTLIB::LDEXP_F64, RTLIB::LDEXP_F80,
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RTLIB::LDEXP_F128, RTLIB::LDEXP_PPCF128, Results);
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break;
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case ISD::FMODF:
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case ISD::FFREXP: {
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RTLIB::Libcall LC = RTLIB::getFREXP(Node->getValueType(0));
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EVT VT = Node->getValueType(0);
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RTLIB::Libcall LC = Node->getOpcode() == ISD::FMODF ? RTLIB::getMODF(VT)
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: RTLIB::getFREXP(VT);
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bool Expanded = DAG.expandMultipleResultFPLibCall(LC, Node, Results,
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/*CallRetResNo=*/0);
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if (!Expanded)
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llvm_unreachable("Expected scalar FFREXP to expand to libcall!");
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llvm_unreachable("Expected scalar FFREXP/FMODF to expand to libcall!");
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break;
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}
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case ISD::FPOWI:
@@ -5503,9 +5506,10 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node) {
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Results.push_back(Tmp2.getValue(1));
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break;
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}
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case ISD::FMODF:
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case ISD::FSINCOS: {
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Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
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Tmp2 = DAG.getNode(ISD::FSINCOS, dl, DAG.getVTList(NVT, NVT), Tmp1,
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Tmp2 = DAG.getNode(Node->getOpcode(), dl, DAG.getVTList(NVT, NVT), Tmp1,
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Node->getFlags());
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Tmp3 = DAG.getIntPtrConstant(0, dl, /*isTarget=*/true);
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for (unsigned ResNum = 0; ResNum < Node->getNumValues(); ResNum++)

‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

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@@ -2766,10 +2766,10 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::FLDEXP: R = PromoteFloatRes_ExpOp(N); break;
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case ISD::FFREXP: R = PromoteFloatRes_FFREXP(N); break;
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case ISD::FMODF:
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case ISD::FSINCOS:
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R = PromoteFloatRes_UnaryWithTwoFPResults(N);
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break;
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case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
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case ISD::STRICT_FP_ROUND:
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R = PromoteFloatRes_STRICT_FP_ROUND(N);
@@ -3228,6 +3228,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
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case ISD::FFREXP: R = SoftPromoteHalfRes_FFREXP(N); break;
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case ISD::FMODF:
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case ISD::FSINCOS:
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R = SoftPromoteHalfRes_UnaryWithTwoFPResults(N);
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break;

‎llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

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@@ -454,6 +454,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
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case ISD::UMULO:
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case ISD::FCANONICALIZE:
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case ISD::FFREXP:
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case ISD::FMODF:
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case ISD::FSINCOS:
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case ISD::SADDSAT:
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case ISD::UADDSAT:
@@ -1223,6 +1224,14 @@ void VectorLegalizer::Expand(SDNode *Node, SmallVectorImpl<SDValue> &Results) {
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return;
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break;
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}
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case ISD::FMODF: {
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RTLIB::Libcall LC =
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RTLIB::getMODF(Node->getValueType(0).getVectorElementType());
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if (DAG.expandMultipleResultFPLibCall(LC, Node, Results,
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/*CallRetResNo=*/0))
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return;
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break;
1234+
}
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case ISD::VECTOR_COMPRESS:
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Results.push_back(TLI.expandVECTOR_COMPRESS(Node, DAG));
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return;

‎llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

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@@ -133,6 +133,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::ADDRSPACECAST:
134134
R = ScalarizeVecRes_ADDRSPACECAST(N);
135135
break;
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case ISD::FMODF:
136137
case ISD::FFREXP:
137138
case ISD::FSINCOS:
138139
R = ScalarizeVecRes_UnaryOpWithTwoResults(N, ResNo);
@@ -1261,6 +1262,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::ADDRSPACECAST:
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SplitVecRes_ADDRSPACECAST(N, Lo, Hi);
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break;
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case ISD::FMODF:
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case ISD::FFREXP:
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case ISD::FSINCOS:
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SplitVecRes_UnaryOpWithTwoResults(N, ResNo, Lo, Hi);
@@ -4811,6 +4813,7 @@ void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::VP_FSHR:
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Res = WidenVecRes_Ternary(N);
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break;
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case ISD::FMODF:
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case ISD::FFREXP:
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case ISD::FSINCOS: {
48164819
if (!unrollExpandedOp())

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