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Drop todo comment
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll

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@@ -309,7 +309,6 @@ define <32 x i32> @v32i32_v4i32(<4 x i32>) {
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ret <32 x i32> %2
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}
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; TODO: This case should be a simple vnsrl, but gets scalarized instead
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define <32 x i8> @vnsrl_v32i8_v64i8(<64 x i8> %in) {
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; CHECK-LABEL: vnsrl_v32i8_v64i8:
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; CHECK: # %bb.0:

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