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yoonseochyoonseoch
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Update lit-tests
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-548
lines changed

7 files changed

+601
-548
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‎llvm/lib/Target/AMDGPU/SIPostRABundler.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -190,7 +190,7 @@ bool SIPostRABundler::run(MachineFunction &MF) {
190190
if (I->getNumExplicitDefs() != 0)
191191
Defs.insert(I->defs().begin()->getReg());
192192
++ClauseLength;
193-
} else if (!!I->isMetaInstruction()) {
193+
} else if (!I->isMetaInstruction()) {
194194
// Allow meta instructions in between bundle candidates, but do not
195195
// start or end a bundle on one.
196196
//

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll‎

Lines changed: 460 additions & 470 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll‎

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -63507,28 +63507,8 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) {
6350763507
;
6350863508
; VI-LABEL: bitcast_v32i16_to_v64i8:
6350963509
; VI: ; %bb.0:
63510-
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
63511-
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
63512-
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
63513-
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
63514-
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
63515-
; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
63516-
; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
63517-
; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
63518-
; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
63519-
; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
63520-
; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
63521-
; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
63522-
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
63523-
; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
63524-
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
63525-
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
63526-
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
63527-
; VI-NEXT: ; implicit-def: $vgpr43
63528-
; VI-NEXT: ; implicit-def: $vgpr42
63529-
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
63530-
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
6353163510
; VI-NEXT: ; implicit-def: $vgpr19
63511+
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6353263512
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
6353363513
; VI-NEXT: ; implicit-def: $vgpr17
6353463514
; VI-NEXT: ; kill: killed $vgpr19
@@ -63549,6 +63529,23 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) {
6354963529
; VI-NEXT: ; implicit-def: $vgpr17
6355063530
; VI-NEXT: ; kill: killed $vgpr19
6355163531
; VI-NEXT: ; implicit-def: $vgpr19
63532+
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
63533+
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
63534+
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
63535+
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
63536+
; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
63537+
; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
63538+
; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
63539+
; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
63540+
; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
63541+
; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
63542+
; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
63543+
; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
63544+
; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
63545+
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
63546+
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
63547+
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
63548+
; VI-NEXT: ; implicit-def: $vgpr43
6355263549
; VI-NEXT: ; kill: killed $vgpr17
6355363550
; VI-NEXT: ; implicit-def: $vgpr17
6355463551
; VI-NEXT: ; kill: killed $vgpr19
@@ -63574,6 +63571,11 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) {
6357463571
; VI-NEXT: ; implicit-def: $vgpr17
6357563572
; VI-NEXT: ; kill: killed $vgpr19
6357663573
; VI-NEXT: ; implicit-def: $vgpr19
63574+
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
63575+
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
63576+
; VI-NEXT: ; implicit-def: $vgpr42
63577+
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
63578+
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
6357763579
; VI-NEXT: ; implicit-def: $vgpr41
6357863580
; VI-NEXT: ; implicit-def: $vgpr18
6357963581
; VI-NEXT: ; implicit-def: $vgpr54
@@ -63605,8 +63607,6 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) {
6360563607
; VI-NEXT: ; implicit-def: $vgpr21
6360663608
; VI-NEXT: ; implicit-def: $vgpr20
6360763609
; VI-NEXT: ; implicit-def: $vgpr19
63608-
; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
63609-
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
6361063610
; VI-NEXT: ; implicit-def: $vgpr42
6361163611
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
6361263612
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]

‎llvm/test/CodeGen/AMDGPU/bundle-breaks-phy-liveness.mir‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -23,10 +23,12 @@ body: |
2323
; GCN-BUNDLE-LABEL: name: clause_implicit_def
2424
; GCN-BUNDLE: liveins: $vgpr0, $sgpr32
2525
; GCN-BUNDLE-NEXT: {{ $}}
26-
; GCN-BUNDLE-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr
27-
; GCN-BUNDLE-NEXT: $vgpr2 = IMPLICIT_DEF
28-
; GCN-BUNDLE-NEXT: $vgpr3 = IMPLICIT_DEF
29-
; GCN-BUNDLE-NEXT: SCRATCH_STORE_DWORDX2_SADDR $vgpr2_vgpr3, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr
26+
; GCN-BUNDLE-NEXT: BUNDLE implicit-def $vgpr2, implicit-def $vgpr3, implicit $vgpr0, implicit $sgpr32, implicit $exec, implicit $flat_scr {
27+
; GCN-BUNDLE-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr
28+
; GCN-BUNDLE-NEXT: $vgpr2 = IMPLICIT_DEF
29+
; GCN-BUNDLE-NEXT: $vgpr3 = IMPLICIT_DEF
30+
; GCN-BUNDLE-NEXT: SCRATCH_STORE_DWORDX2_SADDR internal $vgpr2_vgpr3, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr
31+
; GCN-BUNDLE-NEXT: }
3032
SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr
3133
$vgpr2 = IMPLICIT_DEF
3234
$vgpr3 = IMPLICIT_DEF

‎llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll‎

Lines changed: 25 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -15780,16 +15780,18 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1578015780
; GFX9-NEXT: v_writelane_b32 v40, s14, 10
1578115781
; GFX9-NEXT: v_writelane_b32 v40, s15, 11
1578215782
; GFX9-NEXT: v_writelane_b32 v40, s16, 12
15783-
; GFX9-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
1578415783
; GFX9-NEXT: v_writelane_b32 v40, s17, 13
1578515784
; GFX9-NEXT: v_writelane_b32 v40, s18, 14
15785+
; GFX9-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
1578615786
; GFX9-NEXT: v_writelane_b32 v40, s19, 15
1578715787
; GFX9-NEXT: v_writelane_b32 v40, s20, 16
1578815788
; GFX9-NEXT: v_writelane_b32 v40, s21, 17
15789-
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
15790-
; GFX9-NEXT: s_load_dword s52, s[34:35], 0x0
1579115789
; GFX9-NEXT: v_writelane_b32 v40, s22, 18
1579215790
; GFX9-NEXT: v_writelane_b32 v40, s23, 19
15791+
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
15792+
; GFX9-NEXT: s_load_dword s52, s[34:35], 0x0
15793+
; GFX9-NEXT: ; kill: killed $sgpr34_sgpr35
15794+
; GFX9-NEXT: ; kill: killed $sgpr34_sgpr35
1579315795
; GFX9-NEXT: s_load_dwordx16 s[36:51], s[34:35], 0x40
1579415796
; GFX9-NEXT: s_load_dwordx16 s[4:19], s[34:35], 0x0
1579515797
; GFX9-NEXT: v_writelane_b32 v40, s24, 20
@@ -15812,8 +15814,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1581215814
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
1581315815
; GFX9-NEXT: v_mov_b32_e32 v0, s50
1581415816
; GFX9-NEXT: v_writelane_b32 v40, s30, 26
15815-
; GFX9-NEXT: ; kill: killed $sgpr34_sgpr35
15816-
; GFX9-NEXT: ; kill: killed $sgpr34_sgpr35
1581715817
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:16
1581815818
; GFX9-NEXT: v_mov_b32_e32 v0, s51
1581915819
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32_inreg@abs32@hi
@@ -15880,20 +15880,14 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1588015880
; GFX10-NEXT: v_writelane_b32 v40, s34, 28
1588115881
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
1588215882
; GFX10-NEXT: s_addk_i32 s32, 0x200
15883-
; GFX10-NEXT: ; kill: killed $sgpr34_sgpr35
15884-
; GFX10-NEXT: ; kill: killed $sgpr34_sgpr35
1588515883
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
1588615884
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
1588715885
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
1588815886
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
15889-
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
15890-
; GFX10-NEXT: s_load_dword s52, s[34:35], 0x0
1589115887
; GFX10-NEXT: v_writelane_b32 v40, s8, 4
1589215888
; GFX10-NEXT: v_writelane_b32 v40, s9, 5
1589315889
; GFX10-NEXT: v_writelane_b32 v40, s10, 6
1589415890
; GFX10-NEXT: v_writelane_b32 v40, s11, 7
15895-
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
15896-
; GFX10-NEXT: v_mov_b32_e32 v0, s52
1589715891
; GFX10-NEXT: v_writelane_b32 v40, s12, 8
1589815892
; GFX10-NEXT: v_writelane_b32 v40, s13, 9
1589915893
; GFX10-NEXT: v_writelane_b32 v40, s14, 10
@@ -15902,39 +15896,44 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1590215896
; GFX10-NEXT: v_writelane_b32 v40, s17, 13
1590315897
; GFX10-NEXT: v_writelane_b32 v40, s18, 14
1590415898
; GFX10-NEXT: v_writelane_b32 v40, s19, 15
15905-
; GFX10-NEXT: s_clause 0x1
15899+
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
15900+
; GFX10-NEXT: s_clause 0x2
15901+
; GFX10-NEXT: s_load_dword s52, s[34:35], 0x0
15902+
; GFX10-NEXT: ; meta instruction
15903+
; GFX10-NEXT: ; meta instruction
1590615904
; GFX10-NEXT: s_load_dwordx16 s[36:51], s[34:35], 0x40
1590715905
; GFX10-NEXT: s_load_dwordx16 s[4:19], s[34:35], 0x0
15908-
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
1590915906
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32_inreg@abs32@hi
1591015907
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i32_i32_inreg@abs32@lo
1591115908
; GFX10-NEXT: v_writelane_b32 v40, s20, 16
1591215909
; GFX10-NEXT: v_writelane_b32 v40, s21, 17
1591315910
; GFX10-NEXT: v_writelane_b32 v40, s22, 18
1591415911
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
15915-
; GFX10-NEXT: v_mov_b32_e32 v0, s46
15916-
; GFX10-NEXT: v_writelane_b32 v40, s23, 19
15912+
; GFX10-NEXT: v_mov_b32_e32 v0, s52
1591715913
; GFX10-NEXT: v_mov_b32_e32 v1, s47
15914+
; GFX10-NEXT: v_writelane_b32 v40, s23, 19
15915+
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
15916+
; GFX10-NEXT: v_mov_b32_e32 v0, s46
1591815917
; GFX10-NEXT: v_mov_b32_e32 v2, s48
1591915918
; GFX10-NEXT: v_mov_b32_e32 v3, s49
15920-
; GFX10-NEXT: s_mov_b32 s20, s36
1592115919
; GFX10-NEXT: v_writelane_b32 v40, s24, 20
15920+
; GFX10-NEXT: s_mov_b32 s20, s36
1592215921
; GFX10-NEXT: s_mov_b32 s21, s37
1592315922
; GFX10-NEXT: s_mov_b32 s22, s38
1592415923
; GFX10-NEXT: s_mov_b32 s23, s39
15925-
; GFX10-NEXT: s_mov_b32 s24, s40
1592615924
; GFX10-NEXT: v_writelane_b32 v40, s25, 21
15925+
; GFX10-NEXT: s_mov_b32 s24, s40
1592715926
; GFX10-NEXT: s_mov_b32 s25, s41
1592815927
; GFX10-NEXT: v_mov_b32_e32 v4, s50
1592915928
; GFX10-NEXT: v_mov_b32_e32 v5, s51
15929+
; GFX10-NEXT: v_writelane_b32 v40, s26, 22
15930+
; GFX10-NEXT: s_mov_b32 s26, s42
1593015931
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
1593115932
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
1593215933
; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
1593315934
; GFX10-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:12
1593415935
; GFX10-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:16
1593515936
; GFX10-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:20
15936-
; GFX10-NEXT: v_writelane_b32 v40, s26, 22
15937-
; GFX10-NEXT: s_mov_b32 s26, s42
1593815937
; GFX10-NEXT: v_writelane_b32 v40, s27, 23
1593915938
; GFX10-NEXT: s_mov_b32 s27, s43
1594015939
; GFX10-NEXT: v_writelane_b32 v40, s28, 24
@@ -16100,22 +16099,15 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1610016099
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 28
1610116100
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
1610216101
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
16103-
; GFX10-SCRATCH-NEXT: ; kill: killed $sgpr0_sgpr1
16104-
; GFX10-SCRATCH-NEXT: ; kill: killed $sgpr0_sgpr1
1610516102
; GFX10-SCRATCH-NEXT: s_add_i32 s3, s32, 16
1610616103
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
1610716104
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
1610816105
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
1610916106
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
16110-
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
16111-
; GFX10-SCRATCH-NEXT: s_load_dword s2, s[0:1], 0x0
1611216107
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s8, 4
1611316108
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s9, 5
1611416109
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s10, 6
1611516110
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s11, 7
16116-
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
16117-
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, s2
16118-
; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 24
1611916111
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s12, 8
1612016112
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s13, 9
1612116113
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s14, 10
@@ -16124,7 +16116,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
1612416116
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s17, 13
1612516117
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s18, 14
1612616118
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s19, 15
16127-
; GFX10-SCRATCH-NEXT: s_clause 0x1
16119+
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
16120+
; GFX10-SCRATCH-NEXT: s_clause 0x2
16121+
; GFX10-SCRATCH-NEXT: s_load_dword s2, s[0:1], 0x0
16122+
; GFX10-SCRATCH-NEXT: ; meta instruction
16123+
; GFX10-SCRATCH-NEXT: ; meta instruction
1612816124
; GFX10-SCRATCH-NEXT: s_load_dwordx16 s[36:51], s[0:1], 0x40
1612916125
; GFX10-SCRATCH-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x0
1613016126
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i32_i32_inreg@abs32@hi
@@ -16133,6 +16129,8 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s21, 17
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s22, 18
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; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
16132+
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, s2
16133+
; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 24
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, s50
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s23, 19
1613816136
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, s51

‎llvm/test/CodeGen/AMDGPU/max.i16.ll‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,7 @@ define amdgpu_kernel void @v_test_imax_sge_v3i16(ptr addrspace(1) %out, ptr addr
149149
; GFX9-NEXT: s_nop 0
150150
; GFX9-NEXT: global_load_dword v3, v0, s[6:7]
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; GFX9-NEXT: global_load_dword v4, v0, s[2:3]
152+
; GFX9-NEXT: ; kill: killed $sgpr2_sgpr3
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; GFX9-NEXT: s_nop 0
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; GFX9-NEXT: global_load_short_d16 v1, v0, s[6:7] offset:4
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; GFX9-NEXT: s_waitcnt vmcnt(1)

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