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+20
-8
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3 files changed

+20
-8
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llvm/lib/Transforms/Scalar/ConstraintElimination.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -562,6 +562,18 @@ static Decomposition decompose(Value *V,
562562
}
563563
}
564564

565+
// (x | y) < 0 => (x < 0) || (y < 0)
566+
if (match(V, m_Or(m_Value(Op0), m_Value(Op1)))) {
567+
if (!isKnownNonNegative(Op0, DL) || !isKnownNonNegative(Op1, DL))
568+
return MergeResults(Op0, Op1, IsSigned);
569+
}
570+
571+
// (x & y) < 0 => (x < 0) && (y < 0)
572+
if (match(V, m_And(m_Value(Op0), m_Value(Op1)))) {
573+
if (!isKnownNonNegative(Op0, DL) && !isKnownNonNegative(Op1, DL))
574+
return MergeResults(Op0, Op1, IsSigned);
575+
}
576+
565577
return {V, IsKnownNonNegative};
566578
}
567579

llvm/test/Transforms/ConstraintElimination/and.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -613,13 +613,13 @@ define void @test_decompose_bitwise_and(i4 %x, i4 %y) {
613613
; CHECK: bb1:
614614
; CHECK-NEXT: [[F_1:%.*]] = icmp sge i4 [[X]], 0
615615
; CHECK-NEXT: [[F_2:%.*]] = icmp sge i4 [[Y]], 0
616-
; CHECK-NEXT: [[F_AND:%.*]] = and i1 [[F_1]], [[F_2]]
616+
; CHECK-NEXT: [[F_AND:%.*]] = and i1 false, [[F_2]]
617617
; CHECK-NEXT: call void @use(i1 [[F_AND]])
618618
; CHECK-NEXT: ret void
619619
; CHECK: exit:
620620
; CHECK-NEXT: [[F_3:%.*]] = icmp slt i4 [[X]], 0
621621
; CHECK-NEXT: [[F_4:%.*]] = icmp slt i4 [[Y]], 0
622-
; CHECK-NEXT: [[F_AND_2:%.*]] = and i1 [[F_3]], [[F_4]]
622+
; CHECK-NEXT: [[F_AND_2:%.*]] = and i1 false, [[F_4]]
623623
; CHECK-NEXT: call void @use(i1 [[F_AND_2]])
624624
; CHECK-NEXT: ret void
625625
;
@@ -655,15 +655,15 @@ define void @test_decompose_nested_bitwise_and(i4 %x, i4 %y, i4 %z) {
655655
; CHECK-NEXT: [[F_2:%.*]] = icmp sge i4 [[Y]], 0
656656
; CHECK-NEXT: [[F_3:%.*]] = icmp sge i4 [[Z]], 0
657657
; CHECK-NEXT: [[F_AND:%.*]] = and i1 [[F_1]], [[F_2]]
658-
; CHECK-NEXT: [[F_AND_2:%.*]] = and i1 [[F_AND]], [[F_3]]
658+
; CHECK-NEXT: [[F_AND_2:%.*]] = and i1 [[F_AND]], false
659659
; CHECK-NEXT: call void @use(i1 [[F_AND]])
660660
; CHECK-NEXT: ret void
661661
; CHECK: exit:
662662
; CHECK-NEXT: [[F_4:%.*]] = icmp slt i4 [[X]], 0
663663
; CHECK-NEXT: [[F_5:%.*]] = icmp slt i4 [[Y]], 0
664664
; CHECK-NEXT: [[F_6:%.*]] = icmp slt i4 [[Z]], 0
665665
; CHECK-NEXT: [[F_AND_3:%.*]] = and i1 [[F_4]], [[F_5]]
666-
; CHECK-NEXT: [[F_AND_4:%.*]] = and i1 [[F_AND_3]], [[F_6]]
666+
; CHECK-NEXT: [[F_AND_4:%.*]] = and i1 [[F_AND_3]], false
667667
; CHECK-NEXT: call void @use(i1 [[F_AND_4]])
668668
; CHECK-NEXT: ret void
669669
;

llvm/test/Transforms/ConstraintElimination/or.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -818,13 +818,13 @@ define void @test_decompose_bitwise_or(i4 %x, i4 %y) {
818818
; CHECK: bb1:
819819
; CHECK-NEXT: [[F_1:%.*]] = icmp slt i4 [[X]], 0
820820
; CHECK-NEXT: [[F_2:%.*]] = icmp slt i4 [[Y]], 0
821-
; CHECK-NEXT: [[F_OR:%.*]] = or i1 [[F_1]], [[F_2]]
821+
; CHECK-NEXT: [[F_OR:%.*]] = or i1 true, [[F_2]]
822822
; CHECK-NEXT: call void @use(i1 [[F_OR]])
823823
; CHECK-NEXT: ret void
824824
; CHECK: exit:
825825
; CHECK-NEXT: [[F_3:%.*]] = icmp sge i4 [[X]], 0
826826
; CHECK-NEXT: [[F_4:%.*]] = icmp sge i4 [[Y]], 0
827-
; CHECK-NEXT: [[F_OR_2:%.*]] = or i1 [[F_3]], [[F_4]]
827+
; CHECK-NEXT: [[F_OR_2:%.*]] = or i1 true, [[F_4]]
828828
; CHECK-NEXT: call void @use(i1 [[F_OR_2]])
829829
; CHECK-NEXT: ret void
830830
;
@@ -860,15 +860,15 @@ define void @test_decompose_nested_bitwise_or(i4 %x, i4 %y, i4 %z) {
860860
; CHECK-NEXT: [[F_2:%.*]] = icmp slt i4 [[Y]], 0
861861
; CHECK-NEXT: [[F_3:%.*]] = icmp slt i4 [[Z]], 0
862862
; CHECK-NEXT: [[F_OR:%.*]] = or i1 [[F_1]], [[F_2]]
863-
; CHECK-NEXT: [[F_OR_2:%.*]] = or i1 [[F_OR]], [[F_3]]
863+
; CHECK-NEXT: [[F_OR_2:%.*]] = or i1 [[F_OR]], true
864864
; CHECK-NEXT: call void @use(i1 [[F_OR_2]])
865865
; CHECK-NEXT: ret void
866866
; CHECK: exit:
867867
; CHECK-NEXT: [[F_4:%.*]] = icmp sge i4 [[X]], 0
868868
; CHECK-NEXT: [[F_5:%.*]] = icmp sge i4 [[Y]], 0
869869
; CHECK-NEXT: [[F_6:%.*]] = icmp sge i4 [[Z]], 0
870870
; CHECK-NEXT: [[F_OR_3:%.*]] = or i1 [[F_4]], [[F_5]]
871-
; CHECK-NEXT: [[F_OR_4:%.*]] = or i1 [[F_OR_3]], [[F_6]]
871+
; CHECK-NEXT: [[F_OR_4:%.*]] = or i1 [[F_OR_3]], true
872872
; CHECK-NEXT: call void @use(i1 [[F_OR_4]])
873873
; CHECK-NEXT: ret void
874874
;

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