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[RISCV] Pre-commit
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‎llvm/test/CodeGen/RISCV/rv32xandesperf.ll‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,10 @@
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; RUN: llc -O0 -mtriple=riscv32 -mattr=+xandesperf -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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; NDS.BFOZ
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; MSB >= LSB
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define i32 @bfoz_from_and_i32(i32 %x) {
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; CHECK-LABEL: bfoz_from_and_i32:
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; CHECK: # %bb.0:
@@ -70,6 +74,58 @@ define i64 @bfoz_from_lshr_and_i64(i64 %x) {
7074
ret i64 %shifted
7175
}
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; MSB = 0
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define i32 @bfoz_from_and_shl_with_msb_zero_i32(i32 %x) {
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; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 31
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; CHECK-NEXT: srli a0, a0, 16
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; CHECK-NEXT: ret
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%shifted = shl i32 %x, 15
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%masked = and i32 %shifted, 32768
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ret i32 %masked
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}
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define i32 @bfoz_from_lshr_shl_with_msb_zero_i32(i32 %x) {
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; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 31
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; CHECK-NEXT: srli a0, a0, 13
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; CHECK-NEXT: ret
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%shl = shl i32 %x, 31
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%lshr = lshr i32 %shl, 13
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ret i32 %lshr
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}
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; MSB < LSB
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define i32 @bfoz_from_and_shl_i32(i32 %x) {
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; CHECK-LABEL: bfoz_from_and_shl_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 20
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; CHECK-NEXT: srli a0, a0, 8
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; CHECK-NEXT: ret
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%shifted = shl i32 %x, 12
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%masked = and i32 %shifted, 16773120
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ret i32 %masked
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}
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define i32 @bfoz_from_lshr_shl_i32(i32 %x) {
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; CHECK-LABEL: bfoz_from_lshr_shl_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 26
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; CHECK-NEXT: srli a0, a0, 7
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; CHECK-NEXT: ret
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%shl = shl i32 %x, 26
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%lshr = lshr i32 %shl, 7
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ret i32 %lshr
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}
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; NDS.BFOS
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; MSB >= LSB
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73129
define i32 @bfos_from_ashr_shl_i32(i32 %x) {
74130
; CHECK-LABEL: bfos_from_ashr_shl_i32:
75131
; CHECK: # %bb.0:

‎llvm/test/CodeGen/RISCV/rv64xandesperf.ll‎

Lines changed: 100 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,10 @@
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; RUN: llc -mtriple=riscv64 -mattr=+xandesperf -verify-machineinstrs < %s \
33
; RUN: | FileCheck %s
44

5+
; NDS.BFOZ
6+
7+
; MSB >= LSB
8+
59
define i32 @bfoz_from_and_i32(i32 %x) {
610
; CHECK-LABEL: bfoz_from_and_i32:
711
; CHECK: # %bb.0:
@@ -60,6 +64,102 @@ define i64 @bfoz_from_lshr_and_i64(i64 %x) {
6064
ret i64 %shifted
6165
}
6266

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; MSB = 0
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define i32 @bfoz_from_and_shl_with_msb_zero_i32(i32 %x) {
70+
; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 63
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; CHECK-NEXT: srli a0, a0, 48
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; CHECK-NEXT: ret
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%shifted = shl i32 %x, 15
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%masked = and i32 %shifted, 32768
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ret i32 %masked
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}
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define i64 @bfoz_from_and_shl_with_msb_zero_i64(i64 %x) {
81+
; CHECK-LABEL: bfoz_from_and_shl_with_msb_zero_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 63
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; CHECK-NEXT: srli a0, a0, 15
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; CHECK-NEXT: ret
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%shifted = shl i64 %x, 48
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%masked = and i64 %shifted, 281474976710656
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ret i64 %masked
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}
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define i32 @bfoz_from_lshr_shl_with_msb_zero_i32(i32 %x) {
92+
; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 63
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; CHECK-NEXT: srli a0, a0, 45
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; CHECK-NEXT: ret
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%shl = shl i32 %x, 31
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%lshr = lshr i32 %shl, 13
99+
ret i32 %lshr
100+
}
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102+
define i64 @bfoz_from_lshr_shl_with_msb_zero_i64(i64 %x) {
103+
; CHECK-LABEL: bfoz_from_lshr_shl_with_msb_zero_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 63
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; CHECK-NEXT: srli a0, a0, 19
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; CHECK-NEXT: ret
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%shl = shl i64 %x, 63
109+
%lshr = lshr i64 %shl, 19
110+
ret i64 %lshr
111+
}
112+
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; MSB < LSB
114+
115+
define i32 @bfoz_from_and_shl_i32(i32 %x) {
116+
; CHECK-LABEL: bfoz_from_and_shl_i32:
117+
; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 52
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; CHECK-NEXT: srli a0, a0, 40
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; CHECK-NEXT: ret
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%shifted = shl i32 %x, 12
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%masked = and i32 %shifted, 16773120
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ret i32 %masked
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}
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define i64 @bfoz_from_and_shl_i64(i64 %x) {
127+
; CHECK-LABEL: bfoz_from_and_shl_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 52
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; CHECK-NEXT: srli a0, a0, 28
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; CHECK-NEXT: ret
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%shifted = shl i64 %x, 24
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%masked = and i64 %shifted, 68702699520
134+
ret i64 %masked
135+
}
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137+
define i32 @bfoz_from_lshr_shl_i32(i32 %x) {
138+
; CHECK-LABEL: bfoz_from_lshr_shl_i32:
139+
; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 58
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; CHECK-NEXT: srli a0, a0, 39
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; CHECK-NEXT: ret
143+
%shl = shl i32 %x, 26
144+
%lshr = lshr i32 %shl, 7
145+
ret i32 %lshr
146+
}
147+
148+
define i64 @bfoz_from_lshr_shl_i64(i64 %x) {
149+
; CHECK-LABEL: bfoz_from_lshr_shl_i64:
150+
; CHECK: # %bb.0:
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; CHECK-NEXT: slli a0, a0, 40
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; CHECK-NEXT: srli a0, a0, 15
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; CHECK-NEXT: ret
154+
%shl = shl i64 %x, 40
155+
%lshr = lshr i64 %shl, 15
156+
ret i64 %lshr
157+
}
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159+
; NDS.BFOS
160+
161+
; MSB >= LSB
162+
63163
define i32 @bfos_from_ashr_shl_i32(i32 %x) {
64164
; CHECK-LABEL: bfos_from_ashr_shl_i32:
65165
; CHECK: # %bb.0:

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