Bring in and use MI.isDead()

Change-Id: Ia3e109d47eaa23113e6777079be952fa29eb3e34

Author: jrbyrnes

llvm/include/llvm/CodeGen/MachineInstr.h

@@ -45,6 +45,7 @@ class AAResults;
 template <typename T> class ArrayRef;
 class DIExpression;
 class DILocalVariable;
+class LiveRegUnits;
 class MachineBasicBlock;
 class MachineFunction;
 class MachineRegisterInfo;
@@ -1786,6 +1787,13 @@ class MachineInstr
   /// Return true if all the implicit defs of this instruction are dead.
   bool allImplicitDefsAreDead() const;
 
+  /// Check whether an MI is dead. If \p LivePhysRegs is provided, it is assumed
+  /// to be at the position of MI and will be used to check the Liveness of
+  /// physical register defs. If \p LivePhysRegs is not provided, this will
+  /// pessimistically assume any PhysReg def is live.
+  bool isDead(const MachineRegisterInfo *MRI,
+              LiveRegUnits *LivePhysRegs = nullptr) const;
+
   /// Return a valid size if the instruction is a spill instruction.
   std::optional<LocationSize> getSpillSize(const TargetInstrInfo *TII) const;
 

llvm/lib/CodeGen/DeadMachineInstructionElim.cpp

@@ -38,7 +38,6 @@ class DeadMachineInstructionElimImpl {
   bool runImpl(MachineFunction &MF);
 
 private:
-  bool isDead(const MachineInstr *MI) const;
   bool eliminateDeadMI(MachineFunction &MF);
 };
 
@@ -79,47 +78,6 @@ char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
 INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
                 "Remove dead machine instructions", false, false)
 
-bool DeadMachineInstructionElimImpl::isDead(const MachineInstr *MI) const {
-  // Instructions without side-effects are dead iff they only define dead regs.
-  // This function is hot and this loop returns early in the common case,
-  // so only perform additional checks before this if absolutely necessary.
-  for (const MachineOperand &MO : MI->all_defs()) {
-    Register Reg = MO.getReg();
-    if (Reg.isPhysical()) {
-      // Don't delete live physreg defs, or any reserved register defs.
-      if (!LivePhysRegs.available(Reg) || MRI->isReserved(Reg))
-        return false;
-    } else {
-      if (MO.isDead()) {
-#ifndef NDEBUG
-        // Basic check on the register. All of them should be 'undef'.
-        for (auto &U : MRI->use_nodbg_operands(Reg))
-          assert(U.isUndef() && "'Undef' use on a 'dead' register is found!");
-#endif
-        continue;
-      }
-      for (const MachineInstr &Use : MRI->use_nodbg_instructions(Reg)) {
-        if (&Use != MI)
-          // This def has a non-debug use. Don't delete the instruction!
-          return false;
-      }
-    }
-  }
-
-  // Technically speaking inline asm without side effects and no defs can still
-  // be deleted. But there is so much bad inline asm code out there, we should
-  // let them be.
-  if (MI->isInlineAsm())
-    return false;
-
-  // FIXME: See issue #105950 for why LIFETIME markers are considered dead here.
-  if (MI->isLifetimeMarker())
-    return true;
-
-  // If there are no defs with uses, the instruction might be dead.
-  return MI->wouldBeTriviallyDead();
-}
-
 bool DeadMachineInstructionElimImpl::runImpl(MachineFunction &MF) {
   MRI = &MF.getRegInfo();
 
@@ -146,7 +104,7 @@ bool DeadMachineInstructionElimImpl::eliminateDeadMI(MachineFunction &MF) {
     // liveness as we go.
     for (MachineInstr &MI : make_early_inc_range(reverse(*MBB))) {
       // If the instruction is dead, delete it!
-      if (isDead(&MI)) {
+      if (MI.isDead(MRI, &LivePhysRegs)) {
         LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << MI);
         // It is possible that some DBG_VALUE instructions refer to this
         // instruction. They will be deleted in the live debug variable
@@ -156,11 +114,9 @@ bool DeadMachineInstructionElimImpl::eliminateDeadMI(MachineFunction &MF) {
         ++NumDeletes;
         continue;
       }
-
       LivePhysRegs.stepBackward(MI);
     }
   }
-
   LivePhysRegs.clear();
   return AnyChanges;
 }

llvm/lib/CodeGen/MachineInstr.cpp

@@ -18,6 +18,7 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/MemoryLocation.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -1592,6 +1593,43 @@ bool MachineInstr::allImplicitDefsAreDead() const {
   return true;
 }
 
+bool MachineInstr::isDead(const MachineRegisterInfo *MRI,
+                          LiveRegUnits *LivePhysRegs) const {
+  // Instructions without side-effects are dead iff they only define dead regs.
+  // This function is hot and this loop returns early in the common case,
+  // so only perform additional checks before this if absolutely necessary.
+  for (const MachineOperand &MO : all_defs()) {
+    Register Reg = MO.getReg();
+    if (Reg.isPhysical()) {
+      // Don't delete live physreg defs, or any reserved register defs.
+      if (!LivePhysRegs || !LivePhysRegs->available(Reg) ||
+          MRI->isReserved(Reg))
+        return false;
+    } else {
+      if (MO.isDead())
+        continue;
+      for (const MachineInstr &Use : MRI->use_nodbg_instructions(Reg)) {
+        if (&Use != this)
+          // This def has a non-debug use. Don't delete the instruction!
+          return false;
+      }
+    }
+  }
+
+  // Technically speaking inline asm without side effects and no defs can still
+  // be deleted. But there is so much bad inline asm code out there, we should
+  // let them be.
+  if (isInlineAsm())
+    return false;
+
+  // FIXME: See issue #105950 for why LIFETIME markers are considered dead here.
+  if (isLifetimeMarker())
+    return true;
+
+  // If there are no defs with uses, the instruction might be dead.
+  return wouldBeTriviallyDead();
+}
+
 /// copyImplicitOps - Copy implicit register operands from specified
 /// instruction to this instruction.
 void MachineInstr::copyImplicitOps(MachineFunction &MF,

llvm/lib/CodeGen/MachineSink.cpp

@@ -164,6 +164,8 @@ class MachineSinking : public MachineFunctionPass {
   /// would re-order assignments.
   using SeenDbgUser = PointerIntPair<MachineInstr *, 1>;
 
+  using SinkItem = std::pair<MachineInstr *, MachineBasicBlock *>;
+
   /// Record of DBG_VALUE uses of vregs in a block, so that we can identify
   /// debug instructions to sink.
   SmallDenseMap<unsigned, TinyPtrVector<SeenDbgUser>> SeenDbgUsers;
@@ -259,11 +261,9 @@ class MachineSinking : public MachineFunctionPass {
   void FindCycleSinkCandidates(MachineCycle *Cycle, MachineBasicBlock *BB,
                                SmallVectorImpl<MachineInstr *> &Candidates);
 
-  bool isDead(const MachineInstr *MI) const;
-  bool aggressivelySinkIntoCycle(
-      MachineCycle *Cycle, MachineInstr &I,
-      DenseMap<std::pair<MachineInstr *, MachineBasicBlock *>, MachineInstr *>
-          &SunkInstrs);
+  bool
+  aggressivelySinkIntoCycle(MachineCycle *Cycle, MachineInstr &I,
+                            DenseMap<SinkItem, MachineInstr *> &SunkInstrs);
 
   bool isProfitableToSinkTo(Register Reg, MachineInstr &MI,
                             MachineBasicBlock *MBB,
@@ -692,7 +692,7 @@ void MachineSinking::FindCycleSinkCandidates(
   for (auto &MI : *BB) {
     LLVM_DEBUG(dbgs() << "CycleSink: Analysing candidate: " << MI);
     if (MI.isMetaInstruction()) {
-      LLVM_DEBUG(dbgs() << "CycleSink: Dont sink meta instructions\n");
+      LLVM_DEBUG(dbgs() << "CycleSink: not sinking meta instruction\n");
       continue;
     }
     if (!TII->shouldSink(MI)) {
@@ -789,8 +789,8 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
     SmallVector<MachineCycle *, 8> Cycles(CI->toplevel_cycles());
     SchedModel.init(STI);
     bool HasHighPressure;
-    DenseMap<std::pair<MachineInstr *, MachineBasicBlock *>, MachineInstr *>
-        SunkInstrs;
+
+    DenseMap<SinkItem, MachineInstr *> SunkInstrs;
 
     enum CycleSinkStage { COPY, LOW_LATENCY, AGGRESSIVE, END };
     for (unsigned Stage = CycleSinkStage::COPY; Stage != CycleSinkStage::END;
@@ -1644,52 +1644,14 @@ bool MachineSinking::hasStoreBetween(MachineBasicBlock *From,
   return HasAliasedStore;
 }
 
-bool MachineSinking::isDead(const MachineInstr *MI) const {
-  // Instructions without side-effects are dead iff they only define dead regs.
-  // This function is hot and this loop returns early in the common case,
-  // so only perform additional checks before this if absolutely necessary.
-
-  for (const MachineOperand &MO : MI->all_defs()) {
-    Register Reg = MO.getReg();
-    if (Reg.isPhysical())
-      return false;
-
-    if (MO.isDead()) {
-#ifndef NDEBUG
-      // Basic check on the register. All of them should be 'undef'.
-      for (auto &U : MRI->use_nodbg_operands(Reg))
-        assert(U.isUndef() && "'Undef' use on a 'dead' register is found!");
-#endif
-      continue;
-    }
-
-    if (!(MRI->hasAtMostUserInstrs(Reg, 0)))
-      return false;
-  }
-
-  // Technically speaking inline asm without side effects and no defs can still
-  // be deleted. But there is so much bad inline asm code out there, we should
-  // let them be.
-  if (MI->isInlineAsm())
-    return false;
-
-  // FIXME: See issue #105950 for why LIFETIME markers are considered dead here.
-  if (MI->isLifetimeMarker())
-    return true;
-
-  // If there are no defs with uses, the instruction might be dead.
-  return MI->wouldBeTriviallyDead();
-}
-
 /// Aggressively sink instructions into cycles. This will aggressively try to
 /// sink all instructions in the top-most preheaders in an attempt to reduce RP.
 /// In particular, it will sink into multiple successor blocks without limits
 /// based on the amount of sinking, or the type of ops being sunk (so long as
 /// they are safe to sink).
 bool MachineSinking::aggressivelySinkIntoCycle(
     MachineCycle *Cycle, MachineInstr &I,
-    DenseMap<std::pair<MachineInstr *, MachineBasicBlock *>, MachineInstr *>
-        &SunkInstrs) {
+    DenseMap<SinkItem, MachineInstr *> &SunkInstrs) {
   // TODO: support instructions with multiple defs
   if (I.getNumDefs() > 1)
     return false;
@@ -1713,7 +1675,7 @@ bool MachineSinking::aggressivelySinkIntoCycle(
       continue;
     }
     // We cannot sink before the prologue
-    if (TII->isBasicBlockPrologue(*MI) || MI->isPosition()) {
+    if (MI->isPosition() || TII->isBasicBlockPrologue(*MI)) {
       LLVM_DEBUG(dbgs() << "AggressiveCycleSink:   Use is BasicBlock prologue, "
                            "can't sink.\n");
       continue;
@@ -1726,7 +1688,7 @@ bool MachineSinking::aggressivelySinkIntoCycle(
 
     MachineBasicBlock *SinkBlock = MI->getParent();
     MachineInstr *NewMI = nullptr;
-    std::pair<MachineInstr *, MachineBasicBlock *> MapEntry(&I, SinkBlock);
+    SinkItem MapEntry(&I, SinkBlock);
 
     auto SI = SunkInstrs.find(MapEntry);
 
@@ -1772,7 +1734,7 @@ bool MachineSinking::aggressivelySinkIntoCycle(
                            UseReg.SubReg, *TRI);
   }
   // If we have replaced all uses, then delete the dead instruction
-  if (isDead(&I))
+  if (I.isDead(MRI))
     I.eraseFromParent();
   return true;
 }