@@ -33,6 +33,18 @@ define <8 x i32> @shufflevector_xvshuf4i_v8i32(<8 x i32> %a, <8 x i32> %b) {
3333 ret <8 x i32 > %c
3434}
3535
36+ ;; xvshuf4i.d
37+ define <4 x i64 > @shufflevector_xvshuf4i_v4i64 (<4 x i64 > %a , <4 x i64 > %b ) {
38+ ; CHECK-LABEL: shufflevector_xvshuf4i_v4i64:
39+ ; CHECK: # %bb.0:
40+ ; CHECK-NEXT: xvbsrl.v $xr0, $xr0, 8
41+ ; CHECK-NEXT: xvbsll.v $xr1, $xr1, 8
42+ ; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
43+ ; CHECK-NEXT: ret
44+ %c = shufflevector <4 x i64 > %a , <4 x i64 > %b , <4 x i32 > <i32 1 , i32 4 , i32 3 , i32 6 >
45+ ret <4 x i64 > %c
46+ }
47+
3648;; xvshuf4i.w
3749define <8 x float > @shufflevector_xvshuf4i_v8f32 (<8 x float > %a , <8 x float > %b ) {
3850; CHECK-LABEL: shufflevector_xvshuf4i_v8f32:
@@ -42,3 +54,16 @@ define <8 x float> @shufflevector_xvshuf4i_v8f32(<8 x float> %a, <8 x float> %b)
4254 %c = shufflevector <8 x float > %a , <8 x float > %b , <8 x i32 > <i32 3 , i32 2 , i32 1 , i32 0 , i32 7 , i32 6 , i32 5 , i32 4 >
4355 ret <8 x float > %c
4456}
57+
58+ ;; xvshuf4i.d
59+ define <4 x double > @shufflevector_xvshuf4i_v4f64 (<4 x double > %a , <4 x double > %b ) {
60+ ; CHECK-LABEL: shufflevector_xvshuf4i_v4f64:
61+ ; CHECK: # %bb.0:
62+ ; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0)
63+ ; CHECK-NEXT: xvld $xr2, $a0, %pc_lo12(.LCPI5_0)
64+ ; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0
65+ ; CHECK-NEXT: xvori.b $xr0, $xr2, 0
66+ ; CHECK-NEXT: ret
67+ %c = shufflevector <4 x double > %a , <4 x double > %b , <4 x i32 > <i32 4 , i32 1 , i32 6 , i32 3 >
68+ ret <4 x double > %c
69+ }
0 commit comments