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[PowerPC][NFC] Refactor PPCInstrFutureMMA.td to combine sections (#151194)
Combine same predicate sections into one and move some mma instructions into the proper section.
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‎llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td

Lines changed: 141 additions & 136 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
//===----------------------------------------------------------------------===//
99
//
1010
// This file describes the instructions introduced for the Future CPU for MMA.
11+
// Please reference "PPCInstrVSX.td" for file structure.
1112
//
1213
//===----------------------------------------------------------------------===//
1314

@@ -390,7 +391,12 @@ class XX2Form_AT3_XB6_ID2_E1_BL2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,
390391
let Inst{31} = 0;
391392
}
392393

393-
let Predicates = [IsISAFuture] in {
394+
//-------------------------- Instruction definitions -------------------------//
395+
// Predicate combinations available:
396+
// [MMA, IsISAFuture]
397+
// [MMA, PrefixInstrs, IsISAFuture]
398+
399+
let Predicates = [MMA, IsISAFuture] in {
394400
def DMXXEXTFDMR512 : XX3Form_AT3_XABp5_P1<60, 226,
395401
(outs vsrprc:$XAp, vsrprc:$XBp),
396402
(ins wacc:$AT),
@@ -437,188 +443,187 @@ let Predicates = [IsISAFuture] in {
437443
def DMSETDMRZ : XForm_AT3<31, 2, 177, (outs dmr:$AT), (ins),
438444
"dmsetdmrz $AT", NoItinerary,
439445
[(set v1024i1:$AT, (int_ppc_mma_dmsetdmrz))]>;
440-
}
441-
442-
// MMA+ accumulating/non-accumulating instructions.
443446

444-
// DMXVI8GERX4, DMXVI8GERX4PP, PMDMXVI8GERX4, PMDMXVI8GERX4PP
445-
defm DMXVI8GERX4 : DMR_UM_M448_XOEO<59, 10, (ins vsrprc:$XAp, vsrc:$XB),
446-
"dmxvi8gerx4", "$AT, $XAp, $XB">;
447-
448-
let Predicates = [MMA, IsISAFuture] in {
449-
def DMXVI8GERX4SPP :
450-
XX3Form_AT3_XAp5B6<59, 98, (outs dmr:$AT), (ins dmr:$ATi, vsrprc:$XAp, vsrc:$XB),
451-
"dmxvi8gerx4spp $AT, $XAp, $XB", IIC_VecGeneral, []>,
452-
RegConstraint<"$ATi = $AT">;
453-
}
447+
// DMXVI8GERX4, DMXVI8GERX4PP, PMDMXVI8GERX4, PMDMXVI8GERX4PP
448+
defm DMXVI8GERX4 : DMR_UM_M448_XOEO<59, 10, (ins vsrprc:$XAp, vsrc:$XB),
449+
"dmxvi8gerx4", "$AT, $XAp, $XB">;
450+
451+
// DMXVBF16GERX2, DMXVBF16GERX2PP, DMXVBF16GERX2PN, dMXVBF16GERX2NP,
452+
// DMXVBF16GERX2NN PMDMXVBF16GERX2, PMDMXVBF16GERX2PP, PMDMXVBF16GERX2PN,
453+
// PMDMXVBF16GERX2NP, PMDMXVBF16GERX2NN
454+
defm DMXVBF16GERX2
455+
: DMR_NEG_UM_M284_XOXORf939a0<59, 74, (ins vsrprc:$XAp, vsrc:$XB),
456+
"dmxvbf16gerx2", "$AT, $XAp, $XB">;
457+
458+
// DMXVF16GERX2, DMXVF16GERX2PP, DMXVF16GERX2PN, dMXVF16GERX2NP,
459+
// DMXVF16GERX2NN PMDMXVF16GERX2, PMDMXVF16GERX2PP, PMDMXVF16GERX2PN,
460+
// PMDMXVF16GERX2NP, PMDMXVF16GERX2NN
461+
defm DMXVF16GERX2
462+
: DMR_NEG_UM_M284_XOXORd11188<59, 66, (ins vsrprc:$XAp, vsrc:$XB),
463+
"dmxvf16gerx2", "$AT, $XAp, $XB">;
464+
465+
// DMF cryptography [support] Instructions
466+
def DMSHA2HASH
467+
: XForm_AT3_T1_AB3<
468+
31, 14, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB, u1imm:$T),
469+
"dmsha2hash $AT, $AB, $T",
470+
[(set v1024i1:$AT, (int_ppc_mma_dmsha2hash v1024i1:$ATi,
471+
v1024i1:$AB, timm:$T))]>,
472+
RegConstraint<"$ATi = $AT">;
473+
def DMSHA3HASH
474+
: XForm_ATp2_SR5<31, 15, 177, (outs dmrp:$ATp),
475+
(ins dmrp:$ATpi, u5imm:$SR), "dmsha3hash $ATp, $SR",
476+
[(set v2048i1:$ATp,
477+
(int_ppc_mma_dmsha3hash v2048i1:$ATpi, timm:$SR))]>,
478+
RegConstraint<"$ATpi = $ATp">;
479+
def DMXXSHAPAD
480+
: XX2Form_AT3_XB6_ID2_E1_BL2<60, 421, (outs dmr:$AT),
481+
(ins dmr:$ATi, vsrc:$XB, u2imm:$ID, u1imm:$E,
482+
u2imm:$BL),
483+
"dmxxshapad $AT, $XB, $ID, $E, $BL", []>,
484+
RegConstraint<"$ATi = $AT">;
485+
486+
// MMA+ accumulating/non-accumulating instructions.
487+
def DMXVI8GERX4SPP
488+
: XX3Form_AT3_XAp5B6<59, 98, (outs dmr:$AT),
489+
(ins dmr:$ATi, vsrprc:$XAp, vsrc:$XB),
490+
"dmxvi8gerx4spp $AT, $XAp, $XB", IIC_VecGeneral, []>,
491+
RegConstraint<"$ATi = $AT">;
492+
493+
} // End of [MMA, IsISAFuture]
454494

455495
let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {
456-
def PMDMXVI8GERX4SPP :
457-
MMIRR_XX3Form_X8YP4_XAp5B6<59, 98, (outs dmr:$AT),
458-
(ins dmr:$ATi, vsrprc:$XAp,vsrc:$XB, u8imm:$XMSK,
459-
u4imm:$YMSK, u4imm:$PMSK),
460-
"pmdmxvi8gerx4spp $AT, $XAp, $XB, $XMSK, $YMSK, $PMSK",
461-
IIC_VecGeneral, []>,
462-
RegConstraint<"$ATi = $AT">;
496+
def PMDMXVI8GERX4SPP
497+
: MMIRR_XX3Form_X8YP4_XAp5B6<
498+
59, 98, (outs dmr:$AT),
499+
(ins dmr:$ATi, vsrprc:$XAp, vsrc:$XB, u8imm:$XMSK, u4imm:$YMSK,
500+
u4imm:$PMSK),
501+
"pmdmxvi8gerx4spp $AT, $XAp, $XB, $XMSK, $YMSK, $PMSK",
502+
IIC_VecGeneral, []>,
503+
RegConstraint<"$ATi = $AT">;
463504
}
464505

465-
// DMXVBF16GERX2, DMXVBF16GERX2PP, DMXVBF16GERX2PN, dMXVBF16GERX2NP, DMXVBF16GERX2NN
466-
// PMDMXVBF16GERX2, PMDMXVBF16GERX2PP, PMDMXVBF16GERX2PN, PMDMXVBF16GERX2NP, PMDMXVBF16GERX2NN
467-
defm DMXVBF16GERX2 : DMR_NEG_UM_M284_XOXORf939a0<59, 74, (ins vsrprc:$XAp, vsrc:$XB),
468-
"dmxvbf16gerx2", "$AT, $XAp, $XB">;
469-
470-
// DMXVF16GERX2, DMXVF16GERX2PP, DMXVF16GERX2PN, dMXVF16GERX2NP, DMXVF16GERX2NN
471-
// PMDMXVF16GERX2, PMDMXVF16GERX2PP, PMDMXVF16GERX2PN, PMDMXVF16GERX2NP, PMDMXVF16GERX2NN
472-
defm DMXVF16GERX2 : DMR_NEG_UM_M284_XOXORd11188<59, 66, (ins vsrprc:$XAp, vsrc:$XB),
473-
"dmxvf16gerx2", "$AT, $XAp, $XB">;
474-
475-
// DMF cryptography [support] Instructions
476-
let Predicates = [IsISAFuture] in {
477-
def DMSHA2HASH :
478-
XForm_AT3_T1_AB3<31, 14, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB, u1imm:$T),
479-
"dmsha2hash $AT, $AB, $T",
480-
[(set v1024i1:$AT, (int_ppc_mma_dmsha2hash v1024i1:$ATi, v1024i1:$AB, timm:$T))]>,
481-
RegConstraint<"$ATi = $AT">;
482-
483-
def DMSHA3HASH :
484-
XForm_ATp2_SR5<31, 15, 177, (outs dmrp:$ATp), (ins dmrp:$ATpi , u5imm:$SR),
485-
"dmsha3hash $ATp, $SR",
486-
[(set v2048i1:$ATp, (int_ppc_mma_dmsha3hash v2048i1:$ATpi, timm:$SR))]>,
487-
RegConstraint<"$ATpi = $ATp">;
488-
489-
def DMXXSHAPAD :
490-
XX2Form_AT3_XB6_ID2_E1_BL2<60, 421, (outs dmr:$AT),
491-
(ins dmr:$ATi, vsrc:$XB, u2imm:$ID, u1imm:$E, u2imm:$BL),
492-
"dmxxshapad $AT, $XB, $ID, $E, $BL", []>,
493-
RegConstraint<"$ATi = $AT">;
494-
}
506+
//---------------------------- Anonymous Patterns ----------------------------//
507+
// Predicate combinations available:
508+
// [MMA, IsISAFuture]
509+
// [MMA, PrefixInstrs, IsISAFuture]
495510

496-
// MMA+ Intrinsics
497511
let Predicates = [MMA, IsISAFuture] in {
498-
def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4 v256i1:$XAp, v16i8:$XB)),
512+
// MMA+ Intrinsics
513+
def : Pat<(v1024i1(int_ppc_mma_dmxvi8gerx4 v256i1:$XAp, v16i8:$XB)),
499514
(DMXVI8GERX4 $XAp, RCCp.BToVSRC)>;
500-
def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
515+
def : Pat<(v1024i1(int_ppc_mma_dmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp,
516+
v16i8:$XB)),
501517
(DMXVI8GERX4PP $ATi, $XAp, RCCp.BToVSRC)>;
502-
503-
def : Pat<(v1024i1 (int_ppc_mma_dmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
518+
def : Pat<(v1024i1(int_ppc_mma_dmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp,
519+
v16i8:$XB)),
504520
(DMXVI8GERX4SPP $ATi, $XAp, RCCp.BToVSRC)>;
505-
506-
def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2 v256i1:$XAp, v16i8:$XB)),
521+
def : Pat<(v1024i1(int_ppc_mma_dmxvbf16gerx2 v256i1:$XAp, v16i8:$XB)),
507522
(DMXVBF16GERX2 $XAp, RCCp.BToVSRC)>;
508-
509-
def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
523+
def : Pat<(v1024i1(int_ppc_mma_dmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp,
524+
v16i8:$XB)),
510525
(DMXVBF16GERX2PP $ATi, $XAp, RCCp.BToVSRC)>;
511-
512-
def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
526+
def : Pat<(v1024i1(int_ppc_mma_dmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp,
527+
v16i8:$XB)),
513528
(DMXVBF16GERX2PN $ATi, $XAp, RCCp.BToVSRC)>;
514-
515-
def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
529+
def : Pat<(v1024i1(int_ppc_mma_dmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp,
530+
v16i8:$XB)),
516531
(DMXVBF16GERX2NP $ATi, $XAp, RCCp.BToVSRC)>;
517-
518-
def : Pat<(v1024i1 (int_ppc_mma_dmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
532+
def : Pat<(v1024i1(int_ppc_mma_dmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp,
533+
v16i8:$XB)),
519534
(DMXVBF16GERX2NN $ATi, $XAp, RCCp.BToVSRC)>;
520-
521-
def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2 v256i1:$XAp, v16i8:$XB)),
535+
def : Pat<(v1024i1(int_ppc_mma_dmxvf16gerx2 v256i1:$XAp, v16i8:$XB)),
522536
(DMXVF16GERX2 $XAp, RCCp.BToVSRC)>;
523-
524-
def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
537+
def : Pat<(v1024i1(int_ppc_mma_dmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp,
538+
v16i8:$XB)),
525539
(DMXVF16GERX2PP $ATi, $XAp, RCCp.BToVSRC)>;
526-
527-
def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
540+
def : Pat<(v1024i1(int_ppc_mma_dmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp,
541+
v16i8:$XB)),
528542
(DMXVF16GERX2PN $ATi, $XAp, RCCp.BToVSRC)>;
529-
530-
def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
543+
def : Pat<(v1024i1(int_ppc_mma_dmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp,
544+
v16i8:$XB)),
531545
(DMXVF16GERX2NP $ATi, $XAp, RCCp.BToVSRC)>;
532-
533-
def : Pat<(v1024i1 (int_ppc_mma_dmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB)),
546+
def : Pat<(v1024i1(int_ppc_mma_dmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp,
547+
v16i8:$XB)),
534548
(DMXVF16GERX2NN $ATi, $XAp, RCCp.BToVSRC)>;
549+
550+
// Cryptography Intrinsic
551+
def : Pat<(v1024i1(int_ppc_mma_dmxxshapad v1024i1:$ATi, v16i8:$XB, timm:$ID,
552+
timm:$E, timm:$BL)),
553+
(DMXXSHAPAD $ATi, RCCp.BToVSRC, $ID, $E, $BL)>;
535554
}
536555

537556
let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {
538-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4 v256i1:$XAp, v16i8:$XB, Msk8Imm:$XMSK,
539-
Msk4Imm:$YMSK, Msk4Imm:$PMSK)),
540-
(PMDMXVI8GERX4 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
541-
Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
542-
543-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
544-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
545-
Msk4Imm:$PMSK)),
557+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvi8gerx4 v256i1:$XAp, v16i8:$XB,
558+
Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),
559+
(PMDMXVI8GERX4 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,
560+
Msk4Imm:$PMSK)>;
561+
562+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvi8gerx4pp v1024i1:$ATi, v256i1:$XAp,
563+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),
546564
(PMDMXVI8GERX4PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
547-
Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
565+
Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
548566

549-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
550-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
551-
Msk4Imm:$PMSK)),
567+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvi8gerx4spp v1024i1:$ATi, v256i1:$XAp,
568+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk4Imm:$PMSK)),
552569
(PMDMXVI8GERX4SPP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
553-
Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
570+
Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
554571

555-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2 v256i1:$XAp, v16i8:$XB, Msk8Imm:$XMSK,
556-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
557-
(PMDMXVBF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
558-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
572+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvbf16gerx2 v256i1:$XAp, v16i8:$XB,
573+
Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
574+
(PMDMXVBF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,
575+
Msk2Imm:$PMSK)>;
559576

560-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
561-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
562-
Msk2Imm:$PMSK)),
577+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvbf16gerx2pp v1024i1:$ATi, v256i1:$XAp,
578+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
563579
(PMDMXVBF16GERX2PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
564-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
580+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
565581

566-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
567-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
568-
Msk2Imm:$PMSK)),
582+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvbf16gerx2pn v1024i1:$ATi, v256i1:$XAp,
583+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
569584
(PMDMXVBF16GERX2PN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
570-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
585+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
571586

572-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
573-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
574-
Msk2Imm:$PMSK)),
587+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvbf16gerx2np v1024i1:$ATi, v256i1:$XAp,
588+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
575589
(PMDMXVBF16GERX2NP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
576-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
590+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
577591

578-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
579-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
580-
Msk2Imm:$PMSK)),
592+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvbf16gerx2nn v1024i1:$ATi, v256i1:$XAp,
593+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
581594
(PMDMXVBF16GERX2NN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
582-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
595+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
583596

584-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2 v256i1:$XAp, v16i8:$XB, Msk8Imm:$XMSK,
585-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
586-
(PMDMXVF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
587-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
597+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvf16gerx2 v256i1:$XAp, v16i8:$XB,
598+
Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
599+
(PMDMXVF16GERX2 $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK, Msk4Imm:$YMSK,
600+
Msk2Imm:$PMSK)>;
588601

589-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
590-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
591-
Msk2Imm:$PMSK)),
602+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvf16gerx2pp v1024i1:$ATi, v256i1:$XAp,
603+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
592604
(PMDMXVF16GERX2PP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
593-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
605+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
594606

595-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
596-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
597-
Msk2Imm:$PMSK)),
607+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvf16gerx2pn v1024i1:$ATi, v256i1:$XAp,
608+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
598609
(PMDMXVF16GERX2PN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
599-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
610+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
600611

601-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
602-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
603-
Msk2Imm:$PMSK)),
612+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvf16gerx2np v1024i1:$ATi, v256i1:$XAp,
613+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
604614
(PMDMXVF16GERX2NP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
605-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
615+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
606616

607-
def : Pat<(v1024i1 (int_ppc_mma_pmdmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp, v16i8:$XB,
608-
Msk8Imm:$XMSK, Msk4Imm:$YMSK,
609-
Msk2Imm:$PMSK)),
617+
def : Pat<(v1024i1(int_ppc_mma_pmdmxvf16gerx2nn v1024i1:$ATi, v256i1:$XAp,
618+
v16i8:$XB, Msk8Imm:$XMSK, Msk4Imm:$YMSK, Msk2Imm:$PMSK)),
610619
(PMDMXVF16GERX2NN $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
611-
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
620+
Msk4Imm:$YMSK, Msk2Imm:$PMSK)>;
612621
}
613622

614-
// Cryptography Intrinsic
615-
let Predicates = [IsISAFuture] in {
616-
def : Pat<(v1024i1 (int_ppc_mma_dmxxshapad v1024i1:$ATi, v16i8:$XB, timm:$ID,
617-
timm:$E, timm:$BL)), (DMXXSHAPAD $ATi, RCCp.BToVSRC, $ID, $E, $BL)>;
618-
}
619623

620-
// MMA+ Instruction aliases
621-
let Predicates = [IsISAFuture] in {
624+
//---------------------------- Instruction aliases ---------------------------//
625+
626+
let Predicates = [MMA, IsISAFuture] in {
622627
def : InstAlias<"dmsha256hash $AT, $AB",
623628
(DMSHA2HASH dmr:$AT, dmr:$AB, 0)>;
624629

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