cleanup

Author: Oscar Smith

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

@@ -4018,8 +4018,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
       Results.push_back(Expanded);
     break;
   case ISD::CLMUL:
-    if (SDValue Expanded = TLI.expandCLMUL(Node, DAG))
-      Results.push_back(Expanded);
+    Results.push_back(TLI.expandCLMUL(Node, DAG));
     break;
   case ISD::ROTL:
   case ISD::ROTR:

llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

@@ -5484,29 +5484,29 @@ void DAGTypeLegalizer::ExpandIntRes_FunnelShift(SDNode *N, SDValue &Lo,
 void DAGTypeLegalizer::ExpandIntRes_CLMUL(SDNode *N, SDValue &Lo,
                                                 SDValue &Hi) {
   // Values numbered from least significant to most significant.
-  SDValue In1, In2, In3, In4;
-  GetExpandedInteger(N->getOperand(0), In3, In4);
-  GetExpandedInteger(N->getOperand(1), In1, In2);
-  EVT HalfVT = In1.getValueType();
+  SDValue LL, LH, RL, RH;
+  GetExpandedInteger(N->getOperand(0), LL, LH);
+  GetExpandedInteger(N->getOperand(1), RL, RH);
+  EVT HalfVT = LL.getValueType();
   SDLoc DL(N);
 
   // CLMUL is carryless so Lo is computed from the low half
-  Lo = DAG.getNode(ISD::CLMUL, DL, HalfVT, In1, In3);
+  Lo = DAG.getNode(ISD::CLMUL, DL, HalfVT, LL, RL);
   // the high bits not included in CLMUL(A,B) can be computed by
   // BITREVERSE(CLMUL(BITREVERSE(A), BITREVERSE(B))) >> 1
   // Therefore we can compute the 2 hi/lo cross products
   // and the the overflow of the low product
   // and xor them together to compute HI
-  SDValue BitRevIn1 = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, In1);
-  SDValue BitRevIn3 = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, In3);
-  SDValue BitRevLoHi = DAG.getNode(ISD::CLMUL, DL, HalfVT, BitRevIn1, BitRevIn3);
+  SDValue BitRevLL = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, LL);
+  SDValue BitRevRL = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, RL);
+  SDValue BitRevLoHi = DAG.getNode(ISD::CLMUL, DL, HalfVT, BitRevLL, BitRevRL);
   SDValue LoHi = DAG.getNode(ISD::BITREVERSE, DL, HalfVT, BitRevLoHi);
-  SDValue One = DAG.getConstant(0, DL, HalfVT);
+  SDValue One = DAG.getShiftAmountConstant(1, HalfVT, DL);
   Hi = DAG.getNode(ISD::SRL, DL, HalfVT, LoHi, One);
 
-  SDValue HITMP = DAG.getNode(ISD::CLMUL, DL, HalfVT, In1, In4);
+  SDValue HITMP = DAG.getNode(ISD::CLMUL, DL, HalfVT, LL, RH);
   Hi = DAG.getNode(ISD::XOR, DL, HalfVT, Hi, HITMP);
-  HITMP = DAG.getNode(ISD::CLMUL, DL, HalfVT, In2, In3);
+  HITMP = DAG.getNode(ISD::CLMUL, DL, HalfVT, LH, RL);
   Hi = DAG.getNode(ISD::XOR, DL, HalfVT, Hi, HITMP);
 }
 

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

@@ -7231,7 +7231,11 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
   case Intrinsic::clmul: {
     SDValue Op1 = getValue(I.getArgOperand(0));
     SDValue Op2 = getValue(I.getArgOperand(1));
-    setValue(&I, DAG.getNode(ISD::CLMUL, sdl, Op1.getValueType(), Op1, Op2));
+    EVT VT =  Op1.getValueType();
+    assert(VT.isInteger() && "This operator does not apply to FP types!");
+    assert(Op1.getValueType() == Op2.getValueType() &&
+           Op1.getValueType() == VT && "Binary operator types must match!");
+    setValue(&I, DAG.getNode(ISD::CLMUL, sdl, VT, Op1, Op2));
     return;
   }
   case Intrinsic::sadd_sat: {

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

@@ -8299,12 +8299,12 @@ SDValue TargetLowering::expandCLMUL(SDNode *Node,
   SDValue Res = DAG.getConstant(0, DL, VT);
   SDValue Zero = DAG.getConstant(0, DL, VT);
   SDValue One = DAG.getConstant(1, DL, VT);
-  for (unsigned I = 0; I < NumBitsPerElt-1; ++I) {
+  for (unsigned I = 0; I < NumBitsPerElt; ++I) {
     SDValue LowBit = DAG.getNode(ISD::AND, DL, VT, V1, One);
     SDValue LowBool = DAG.getSetCC(DL, SetCCType, LowBit, Zero, ISD::SETNE);
     SDValue Pred = DAG.getNode(ISD::SELECT, DL, VT, LowBool, V2, Zero);
     Res = DAG.getNode(ISD::XOR, DL, VT, Res, Pred);
-    if (I != NumBitsPerElt) {
+    if (I != NumBitsPerElt-1) {
       V1 = DAG.getNode(ISD::SRL, DL, VT, V1, One);
       V2 = DAG.getNode(ISD::SHL, DL, VT, V2, One);
     }