Skip to content

Commit 4e5cca7

Browse files
committed
use llvm::vector
1 parent 4934de9 commit 4e5cca7

File tree

1 file changed

+6
-6
lines changed

1 file changed

+6
-6
lines changed

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3738,16 +3738,16 @@ bool SPIRVInstructionSelector::selectResourceNonUniformIndex(
37383738

37393739
void SPIRVInstructionSelector::decorateUsesAsNonUniform(
37403740
Register &NonUniformReg) const {
3741-
std::vector<Register> WorkList = {NonUniformReg};
3741+
llvm::SmallVector<Register> WorkList = {NonUniformReg};
37423742
while (WorkList.size() > 0) {
3743-
Register CurrentReg = WorkList.at(0);
3744-
WorkList.erase(WorkList.begin());
3743+
Register CurrentReg = WorkList.back();
3744+
WorkList.pop_back();
37453745

3746-
bool isDecorated = false;
3746+
bool IsDecorated = false;
37473747
for (MachineInstr &Use : MRI->use_instructions(CurrentReg)) {
37483748
if (Use.getOpcode() == SPIRV::OpDecorate &&
37493749
Use.getOperand(1).getImm() == SPIRV::Decoration::NonUniformEXT) {
3750-
isDecorated = true;
3750+
IsDecorated = true;
37513751
continue;
37523752
}
37533753
// Check if the instruction has the result register and add it to the
@@ -3760,7 +3760,7 @@ void SPIRVInstructionSelector::decorateUsesAsNonUniform(
37603760
}
37613761
}
37623762

3763-
if (!isDecorated) {
3763+
if (!IsDecorated) {
37643764
buildOpDecorate(CurrentReg, *MRI->getVRegDef(CurrentReg), TII,
37653765
SPIRV::Decoration::NonUniformEXT, {});
37663766
}

0 commit comments

Comments
 (0)