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Merge remote-tracking branch 'origin/main' into vplan-resumephi-vpinst-for-reductions
2 parents baf5aac + 4994051 commit 4e652bd

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‎clang/docs/ReleaseNotes.rst‎

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@@ -302,6 +302,11 @@ Modified Compiler Flags
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the ``promoted`` algorithm for complex division when possible rather than the
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less basic (limited range) algorithm.
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- The ``-fveclib`` option has been updated to enable ``-fno-math-errno`` for
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``-fveclib=ArmPL`` and ``-fveclib=SLEEF``. This gives Clang more opportunities
307+
to utilize these vector libraries. The behavior for all other vector function
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libraries remains unchanged.
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Removed Compiler Flags
306311
-------------------------
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‎clang/include/clang/Analysis/FlowSensitive/NoopLattice.h‎

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@@ -14,6 +14,7 @@
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#define LLVM_CLANG_ANALYSIS_FLOWSENSITIVE_NOOP_LATTICE_H
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#include "clang/Analysis/FlowSensitive/DataflowLattice.h"
17+
#include "clang/Support/Compiler.h"
1718
#include "llvm/ADT/Any.h"
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#include <ostream>
1920

‎clang/include/clang/Basic/AArch64SVEACLETypes.def‎

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@@ -107,7 +107,6 @@
107107
AARCH64_VECTOR_TYPE(Name, MangledName, Id, SingletonId)
108108
#endif
109109

110-
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//===- Vector point types -----------------------------------------------===//
112111

113112
SVE_VECTOR_TYPE_INT("__SVInt8_t", "__SVInt8_t", SveInt8, SveInt8Ty, 16, 8, 1, true)
@@ -201,6 +200,7 @@ SVE_PREDICATE_TYPE_ALL("__clang_svboolx4_t", "svboolx4_t", SveBoolx4, SveBoolx4T
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202201
SVE_OPAQUE_TYPE("__SVCount_t", "__SVCount_t", SveCount, SveCountTy)
203202

203+
AARCH64_VECTOR_TYPE_MFLOAT("__MFloat8_t", "__MFloat8_t", MFloat8, MFloat8Ty, 1, 8, 1)
204204
AARCH64_VECTOR_TYPE_MFLOAT("__MFloat8x8_t", "__MFloat8x8_t", MFloat8x8, MFloat8x8Ty, 8, 8, 1)
205205
AARCH64_VECTOR_TYPE_MFLOAT("__MFloat8x16_t", "__MFloat8x16_t", MFloat8x16, MFloat8x16Ty, 16, 8, 1)
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‎clang/include/clang/Serialization/ASTBitCodes.h‎

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@@ -1149,7 +1149,7 @@ enum PredefinedTypeIDs {
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///
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/// Type IDs for non-predefined types will start at
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/// NUM_PREDEF_TYPE_IDs.
1152-
const unsigned NUM_PREDEF_TYPE_IDS = 511;
1152+
const unsigned NUM_PREDEF_TYPE_IDS = 512;
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// Ensure we do not overrun the predefined types we reserved
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// in the enum PredefinedTypeIDs above.

‎clang/lib/CodeGen/CGDebugInfo.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -783,6 +783,13 @@ llvm::DIType *CGDebugInfo::CreateType(const BuiltinType *BT) {
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#define SVE_TYPE(Name, Id, SingletonId) case BuiltinType::Id:
784784
#include "clang/Basic/AArch64SVEACLETypes.def"
785785
{
786+
if (BT->getKind() == BuiltinType::MFloat8) {
787+
Encoding = llvm::dwarf::DW_ATE_unsigned_char;
788+
BTName = BT->getName(CGM.getLangOpts());
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// Bit size and offset of the type.
790+
uint64_t Size = CGM.getContext().getTypeSize(BT);
791+
return DBuilder.createBasicType(BTName, Size, Encoding);
792+
}
786793
ASTContext::BuiltinVectorTypeInfo Info =
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// For svcount_t, only the lower 2 bytes are relevant.
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BT->getKind() == BuiltinType::SveCount

‎clang/test/AST/arm-mfp8.cpp‎

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@@ -0,0 +1,91 @@
1+
// RUN: %clang_cc1 -std=c++11 -triple aarch64-arm-none-eabi -target-feature -fp8 -ast-dump %s | \
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// RUN: FileCheck %s --strict-whitespace
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// REQUIRES: aarch64-registered-target || arm-registered-target
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/* Various contexts where type __mfp8 can appear. */
7+
8+
#include<arm_neon.h>
9+
/* Namespace */
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namespace {
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__mfp8 f2n;
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__mfp8 arr1n[10];
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}
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//CHECK: |-NamespaceDecl {{.*}}
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//CHECK-NEXT: | |-VarDecl {{.*}} f2n '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: | `-VarDecl {{.*}} arr1n '__mfp8[10]'
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const __mfp8 func1n(const __mfp8 mfp8) {
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// this should fail
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__mfp8 f1n;
23+
f1n = mfp8;
24+
return f1n;
25+
}
26+
//CHECK: |-FunctionDecl {{.*}} func1n 'const __mfp8 (const __mfp8)'
27+
//CHECK: | `-VarDecl {{.*}} f1n '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: |-BinaryOperator {{.*}} '__mfp8':'__MFloat8_t' lvalue '='
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//CHECK-NEXT: | |-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue Var {{.*}} 'f1n' '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
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//CHECK-NEXT: | `-DeclRefExpr {{.*}} 'const __mfp8':'const __MFloat8_t' lvalue ParmVar {{.*}} 'mfp8' 'const __mfp8':'const __MFloat8_t'
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//CHECK-NEXT: `-ReturnStmt {{.*}}
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//CHECK-NEXT: `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
34+
//CHECK-NEXT: `-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue Var {{.*}} 'f1n' '__mfp8':'__MFloat8_t'
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36+
37+
/* Class */
38+
39+
class C1 {
40+
__mfp8 f1c;
41+
static const __mfp8 f2c;
42+
volatile __MFloat8_t f3c;
43+
public:
44+
C1(__mfp8 arg) : f1c(arg), f3c(arg) { }
45+
__mfp8 func1c(__mfp8 arg ) {
46+
return arg;
47+
}
48+
static __mfp8 func2c(__mfp8 arg) {
49+
return arg;
50+
}
51+
};
52+
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//CHECK: | |-CXXRecordDecl {{.*}} referenced class C1
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//CHECK-NEXT: | |-FieldDecl {{.*}} f1c '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: | |-VarDecl {{.*}} f2c 'const __mfp8':'const __MFloat8_t' static
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//CHECK-NEXT: | |-FieldDecl {{.*}} f3c 'volatile __MFloat8_t'
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//CHECK-NEXT: | |-AccessSpecDecl {{.*}}
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//CHECK-NEXT: | |-CXXConstructorDecl {{.*}} C1 'void (__mfp8)' implicit-inline
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//CHECK-NEXT: | | |-ParmVarDecl {{.*}} arg '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: | | |-CXXCtorInitializer {{.*}} 'f1c' '__mfp8':'__MFloat8_t'
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//CHECK-NEXT: | | | `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
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//CHECK-NEXT: | | | `-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue ParmVar {{.*}} 'arg' '__mfp8':'__MFloat8_t'
63+
//CHECK-NEXT: | | |-CXXCtorInitializer {{.*}} 'f3c' 'volatile __MFloat8_t'
64+
//CHECK-NEXT: | | | `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
65+
//CHECK-NEXT: | | | `-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue ParmVar {{.*}} 'arg' '__mfp8':'__MFloat8_t'
66+
//CHECK-NEXT: | | `-CompoundStmt {{.*}}
67+
//CHECK-NEXT: | |-CXXMethodDecl {{.*}} func1c '__mfp8 (__mfp8)' implicit-inline
68+
//CHECK-NEXT: | | |-ParmVarDecl {{.*}} arg '__mfp8':'__MFloat8_t'
69+
//CHECK-NEXT: | | `-CompoundStmt {{.*}}
70+
//CHECK-NEXT: | | `-ReturnStmt {{.*}}
71+
//CHECK-NEXT: | | `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
72+
//CHECK-NEXT: | | `-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue ParmVar {{.*}}8 'arg' '__mfp8':'__MFloat8_t'
73+
//CHECK-NEXT: | `-CXXMethodDecl {{.*}} func2c '__mfp8 (__mfp8)' static implicit-inline
74+
//CHECK-NEXT: | |-ParmVarDecl {{.*}} arg '__mfp8':'__MFloat8_t'
75+
//CHECK-NEXT: | `-CompoundStmt {{.*}}
76+
//CHECK-NEXT: | `-ReturnStmt {{.*}}
77+
//CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '__mfp8':'__MFloat8_t' <LValueToRValue>
78+
//CHECK-NEXT: | `-DeclRefExpr {{.*}} '__mfp8':'__MFloat8_t' lvalue ParmVar {{.*}} 'arg' '__mfp8':'__MFloat8_t'
79+
80+
template <class C> struct S1 {
81+
C mem1;
82+
};
83+
84+
template <> struct S1<__mfp8> {
85+
__mfp8 mem2;
86+
};
87+
88+
//CHECK: |-TemplateArgument type '__MFloat8_t'
89+
//CHECK-NEXT: | `-BuiltinType {{.*}} '__MFloat8_t'
90+
//CHECK-NEXT: |-CXXRecordDecl {{.*}} implicit struct S1
91+
//CHECK-NEXT: `-FieldDecl {{.*}} mem2 '__mfp8':'__MFloat8_t'

‎clang/test/CodeGen/aarch64-debug-types.c‎

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@@ -0,0 +1,9 @@
1+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon -target-feature +fp8 \
2+
// RUN: -emit-llvm -o - %s -debug-info-kind=limited 2>&1 | FileCheck %s
3+
#include<arm_neon.h>
4+
5+
void test_locals(void) {
6+
// CHECK-DAG: !DIDerivedType(tag: DW_TAG_typedef, name: "__MFloat8_t", {{.*}}, baseType: ![[ELTTYU8:[0-9]+]]
7+
// CHECK-DAG: ![[ELTTYU8]] = !DIBasicType(name: "__MFloat8_t", size: 8, encoding: DW_ATE_unsigned_char)
8+
__MFloat8_t mfp8;
9+
}

‎clang/test/CodeGen/arm-mfp8.c‎

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Original file line numberDiff line numberDiff line change
@@ -47,5 +47,39 @@ mfloat8x8_t test_ret_mfloat8x8_t(mfloat8x8_t v) {
4747
return v;
4848
}
4949

50+
// CHECK-C-LABEL: define dso_local <1 x i8> @func1n(
51+
// CHECK-C-SAME: <1 x i8> [[MFP8:%.*]]) #[[ATTR0]] {
52+
// CHECK-C-NEXT: [[ENTRY:.*:]]
53+
// CHECK-C-NEXT: [[MFP8_ADDR:%.*]] = alloca <1 x i8>, align 1
54+
// CHECK-C-NEXT: [[F1N:%.*]] = alloca [10 x <1 x i8>], align 1
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// CHECK-C-NEXT: store <1 x i8> [[MFP8]], ptr [[MFP8_ADDR]], align 1
56+
// CHECK-C-NEXT: [[TMP0:%.*]] = load <1 x i8>, ptr [[MFP8_ADDR]], align 1
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// CHECK-C-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x <1 x i8>], ptr [[F1N]], i64 0, i64 2
58+
// CHECK-C-NEXT: store <1 x i8> [[TMP0]], ptr [[ARRAYIDX]], align 1
59+
// CHECK-C-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [10 x <1 x i8>], ptr [[F1N]], i64 0, i64 2
60+
// CHECK-C-NEXT: [[TMP1:%.*]] = load <1 x i8>, ptr [[ARRAYIDX1]], align 1
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// CHECK-C-NEXT: ret <1 x i8> [[TMP1]]
62+
//
63+
// CHECK-CXX-LABEL: define dso_local <1 x i8> @_Z6func1nu11__MFloat8_t(
64+
// CHECK-CXX-SAME: <1 x i8> [[MFP8:%.*]]) #[[ATTR0]] {
65+
// CHECK-CXX-NEXT: [[ENTRY:.*:]]
66+
// CHECK-CXX-NEXT: [[MFP8_ADDR:%.*]] = alloca <1 x i8>, align 1
67+
// CHECK-CXX-NEXT: [[F1N:%.*]] = alloca [10 x <1 x i8>], align 1
68+
// CHECK-CXX-NEXT: store <1 x i8> [[MFP8]], ptr [[MFP8_ADDR]], align 1
69+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = load <1 x i8>, ptr [[MFP8_ADDR]], align 1
70+
// CHECK-CXX-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x <1 x i8>], ptr [[F1N]], i64 0, i64 2
71+
// CHECK-CXX-NEXT: store <1 x i8> [[TMP0]], ptr [[ARRAYIDX]], align 1
72+
// CHECK-CXX-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [10 x <1 x i8>], ptr [[F1N]], i64 0, i64 2
73+
// CHECK-CXX-NEXT: [[TMP1:%.*]] = load <1 x i8>, ptr [[ARRAYIDX1]], align 1
74+
// CHECK-CXX-NEXT: ret <1 x i8> [[TMP1]]
75+
//
76+
__mfp8 func1n(__mfp8 mfp8) {
77+
__mfp8 f1n[10];
78+
f1n[2] = mfp8;
79+
return f1n[2];
80+
}
81+
82+
83+
5084
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
5185
// CHECK: {{.*}}

‎clang/test/Driver/print-supported-extensions-riscv.c‎

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@@ -120,6 +120,8 @@
120120
// CHECK-NEXT: smcdeleg 1.0 'Smcdeleg' (Counter Delegation Machine Level)
121121
// CHECK-NEXT: smcsrind 1.0 'Smcsrind' (Indirect CSR Access Machine Level)
122122
// CHECK-NEXT: smepmp 1.0 'Smepmp' (Enhanced Physical Memory Protection)
123+
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
124+
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
123125
// CHECK-NEXT: smrnmi 1.0 'Smrnmi' (Resumable Non-Maskable Interrupts)
124126
// CHECK-NEXT: smstateen 1.0 'Smstateen' (Machine-mode view of the state-enable extension)
125127
// CHECK-NEXT: ssaia 1.0 'Ssaia' (Advanced Interrupt Architecture Supervisor Level)
@@ -128,13 +130,16 @@
128130
// CHECK-NEXT: sscofpmf 1.0 'Sscofpmf' (Count Overflow and Mode-Based Filtering)
129131
// CHECK-NEXT: sscounterenw 1.0 'Sscounterenw' (Support writeable scounteren enable bit for any hpmcounter that is not read-only zero)
130132
// CHECK-NEXT: sscsrind 1.0 'Sscsrind' (Indirect CSR Access Supervisor Level)
133+
// CHECK-NEXT: ssnpm 1.0 'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)
134+
// CHECK-NEXT: sspm 1.0 'Sspm' (Indicates Supervisor-mode Pointer Masking)
131135
// CHECK-NEXT: ssqosid 1.0 'Ssqosid' (Quality-of-Service (QoS) Identifiers)
132136
// CHECK-NEXT: ssstateen 1.0 'Ssstateen' (Supervisor-mode view of the state-enable extension)
133137
// CHECK-NEXT: ssstrict 1.0 'Ssstrict' (No non-conforming extensions are present)
134138
// CHECK-NEXT: sstc 1.0 'Sstc' (Supervisor-mode timer interrupts)
135139
// CHECK-NEXT: sstvala 1.0 'Sstvala' (stval provides all needed values)
136140
// CHECK-NEXT: sstvecd 1.0 'Sstvecd' (stvec supports Direct mode)
137141
// CHECK-NEXT: ssu64xl 1.0 'Ssu64xl' (UXLEN=64 supported)
142+
// CHECK-NEXT: supm 1.0 'Supm' (Indicates User-mode Pointer Masking)
138143
// CHECK-NEXT: svade 1.0 'Svade' (Raise exceptions on improper A/D bits)
139144
// CHECK-NEXT: svadu 1.0 'Svadu' (Hardware A/D updates)
140145
// CHECK-NEXT: svbare 1.0 'Svbare' $(satp mode Bare supported)
@@ -177,12 +182,7 @@
177182
// CHECK-NEXT: zvbc32e 0.7 'Zvbc32e' (Vector Carryless Multiplication with 32-bits elements)
178183
// CHECK-NEXT: zvkgs 0.7 'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)
179184
// CHECK-NEXT: smctr 1.0 'Smctr' (Control Transfer Records Machine Level)
180-
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
181-
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
182185
// CHECK-NEXT: ssctr 1.0 'Ssctr' (Control Transfer Records Supervisor Level)
183-
// CHECK-NEXT: ssnpm 1.0 'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)
184-
// CHECK-NEXT: sspm 1.0 'Sspm' (Indicates Supervisor-mode Pointer Masking)
185-
// CHECK-NEXT: supm 1.0 'Supm' (Indicates User-mode Pointer Masking)
186186
// CHECK-EMPTY:
187187
// CHECK-NEXT: Supported Profiles
188188
// CHECK-NEXT: rva20s64

‎clang/test/Driver/riscv-profiles.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -195,7 +195,7 @@
195195
// RVA23S64: "-target-feature" "+ssccptr"
196196
// RVA23S64: "-target-feature" "+sscofpmf"
197197
// RVA23S64: "-target-feature" "+sscounterenw"
198-
// RVA23S64: "-target-feature" "+experimental-ssnpm"
198+
// RVA23S64: "-target-feature" "+ssnpm"
199199
// RVA23S64: "-target-feature" "+ssstateen"
200200
// RVA23S64: "-target-feature" "+sstc"
201201
// RVA23S64: "-target-feature" "+sstvala"

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