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Add testcase that spills a killed register
Signed-off-by: John Lu <[email protected]>
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‎llvm/test/CodeGen/AMDGPU/spilled_kill.mir‎

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# RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs -start-before=prologepilog -stop-after=postrapseudos -o - %s | FileCheck -check-prefix=GCN %s
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# This testcase shows the necessity of adding an undef flag to the $sgpr source when
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# creating a V_WRITELANE_B32.
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#
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# The prologepilog pass will create a:
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#
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# $exec = S_MOV_B64 killed $sgpr4_sgpr5
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#
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# but $sgpr5 will be spilled by a:
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#
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# $vgpr1 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, killed $vgpr1(tied-def 0), implicit $sgpr4_sgpr5
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#
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# The SI_SPILL_S32_TO_VGPR will be converted in postrapesudos to:
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#
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# $vgpr1 = V_WRITELANE_B32 undef $sgpr5, 1, killed $vgpr1(tied-def 0)
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#
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# The undef flag is necessary to satisfy the MachineVerifier since $sgpr5 is used after a kill.
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# This testcase was derived from function bitcast_v32i16_to_v64i8_scalar in amdgcn.bitcast.512bit.ll.
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# GCN-LABEL: name: bitcast_v32i16_to_v64i8_scalar
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---
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name: bitcast_v32i16_to_v64i8_scalar
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alignment: 1
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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callsEHReturn: false
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callsUnwindInit: false
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hasEHContTarget: false
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hasEHScopes: false
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hasEHFunclets: false
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isOutlined: false
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debugInstrRef: false
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failsVerification: false
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tracksDebugUserValues: true
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registers: []
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liveins: []
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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functionContext: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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isCalleeSavedInfoValid: false
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localFrameSize: 0
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fixedStack: []
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stack:
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- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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entry_values: []
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo:
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explicitKernArgSize: 0
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maxKernArgAlign: 1
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ldsSize: 0
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gdsSize: 0
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dynLDSAlign: 1
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isEntryFunction: false
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isChainFunction: false
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noSignedZerosFPMath: false
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memoryBound: false
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waveLimiter: false
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hasSpilledSGPRs: true
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hasSpilledVGPRs: true
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numWaveDispatchSGPRs: 30
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numWaveDispatchVGPRs: 20
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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bytesInStackArgArea: 0
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returnsVoid: true
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argumentInfo:
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privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
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dispatchPtr: { reg: '$sgpr4_sgpr5' }
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queuePtr: { reg: '$sgpr6_sgpr7' }
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dispatchID: { reg: '$sgpr10_sgpr11' }
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workGroupIDX: { reg: '$sgpr12' }
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workGroupIDY: { reg: '$sgpr13' }
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workGroupIDZ: { reg: '$sgpr14' }
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LDSKernelId: { reg: '$sgpr15' }
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implicitArgPtr: { reg: '$sgpr8_sgpr9' }
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workItemIDX: { reg: '$vgpr31', mask: 1023 }
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workItemIDY: { reg: '$vgpr31', mask: 1047552 }
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workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
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psInputAddr: 0
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psInputEnable: 0
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maxMemoryClusterDWords: 8
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mode:
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ieee: true
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dx10-clamp: true
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fp32-input-denormals: true
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fp32-output-denormals: true
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fp64-fp16-input-denormals: true
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fp64-fp16-output-denormals: true
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highBitsOf32BitAddress: 0
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occupancy: 3
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spillPhysVGPRs:
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- '$vgpr63'
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wwmReservedRegs:
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- '$vgpr63'
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- '$vgpr62'
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vgprForAGPRCopy: ''
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sgprForEXECCopy: '$sgpr100_sgpr101'
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longBranchReservedReg: ''
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hasInitWholeWave: false
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dynamicVGPRBlockSize: 0
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scratchReservedForDynamicVGPRs: 0
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numKernargPreloadSGPRs: 0
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isWholeWaveFunction: false
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body: |
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bb.0:
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successors: %bb.3(0x40000000), %bb.1(0x40000000)
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renamable $sgpr4 = IMPLICIT_DEF
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$vgpr62 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, killed $vgpr62, implicit $sgpr4_sgpr5
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S_CBRANCH_EXECZ %bb.1, implicit $exec
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S_BRANCH %bb.3
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bb.1:
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successors: %bb.2(0x40000000), %bb.4(0x40000000)
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S_CBRANCH_EXECZ %bb.4, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.4(0x80000000)
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S_BRANCH %bb.4
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bb.3:
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successors: %bb.1(0x80000000)
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S_BRANCH %bb.1
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bb.4:
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SI_RETURN
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...

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