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[Loads] Apply loop guards to IRArgValue from assumption.
Applying loop guards to IRArgValue can improve results in some cases.
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2 files changed

+9
-26
lines changed

2 files changed

+9
-26
lines changed

llvm/lib/Analysis/Loads.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -392,9 +392,10 @@ bool llvm::isDereferenceableAndAlignedInLoop(
392392
Instruction *HeaderFirstNonPHI = &*L->getHeader()->getFirstNonPHIIt();
393393
return isDereferenceableAndAlignedPointerViaAssumption(
394394
Base, Alignment,
395-
[&SE, AccessSizeSCEV](const RetainedKnowledge &RK) {
396-
return SE.isKnownPredicate(CmpInst::ICMP_ULE, AccessSizeSCEV,
397-
SE.getSCEV(RK.IRArgValue));
395+
[&SE, AccessSizeSCEV, &LoopGuards](const RetainedKnowledge &RK) {
396+
return SE.isKnownPredicate(
397+
CmpInst::ICMP_ULE, AccessSizeSCEV,
398+
SE.applyLoopGuards(SE.getSCEV(RK.IRArgValue), *LoopGuards));
398399
},
399400
DL, HeaderFirstNonPHI, AC, &DT) ||
400401
isDereferenceableAndAlignedPointer(Base, Alignment, AccessSize, DL,

llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll

Lines changed: 5 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -13,31 +13,13 @@ define void @loop_guard_on_assume_needed_to_prove_dereferenceable_ptr_arg_nounde
1313
; CHECK: [[VECTOR_PH]]:
1414
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
1515
; CHECK: [[VECTOR_BODY]]:
16-
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_LOAD_CONTINUE2:.*]] ]
16+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
1717
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[B]], i64 [[INDEX]]
1818
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
19-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i32> [[WIDE_LOAD]], zeroinitializer
20-
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
21-
; CHECK-NEXT: br i1 [[TMP2]], label %[[PRED_LOAD_IF:.*]], label %[[PRED_LOAD_CONTINUE:.*]]
22-
; CHECK: [[PRED_LOAD_IF]]:
23-
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
24-
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP3]]
25-
; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
26-
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP5]], i32 0
27-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE]]
28-
; CHECK: [[PRED_LOAD_CONTINUE]]:
29-
; CHECK-NEXT: [[TMP7:%.*]] = phi <2 x i32> [ poison, %[[VECTOR_BODY]] ], [ [[TMP6]], %[[PRED_LOAD_IF]] ]
30-
; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP1]], i32 1
31-
; CHECK-NEXT: br i1 [[TMP8]], label %[[PRED_LOAD_IF1:.*]], label %[[PRED_LOAD_CONTINUE2]]
32-
; CHECK: [[PRED_LOAD_IF1]]:
33-
; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 1
34-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[A]], i64 [[TMP9]]
35-
; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
36-
; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP11]], i32 1
37-
; CHECK-NEXT: br label %[[PRED_LOAD_CONTINUE2]]
38-
; CHECK: [[PRED_LOAD_CONTINUE2]]:
39-
; CHECK-NEXT: [[TMP13:%.*]] = phi <2 x i32> [ [[TMP7]], %[[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], %[[PRED_LOAD_IF1]] ]
40-
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP13]], <2 x i32> [[WIDE_LOAD]]
19+
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], zeroinitializer
20+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[A]], i64 [[INDEX]]
21+
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4
22+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[WIDE_LOAD]], <2 x i32> [[WIDE_LOAD1]]
4123
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 [[INDEX]]
4224
; CHECK-NEXT: store <2 x i32> [[PREDPHI]], ptr [[TMP14]], align 4
4325
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2

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