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[SLP][X86] Add test coverage for #124993 
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‎llvm/test/Transforms/SLPVectorizer/X86/scalarize-ctlz.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-- -mcpu=x86-64 %s | FileCheck %s --check-prefixes=SSE,SSE2
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-- -mcpu=x86-64-v2 %s | FileCheck %s --check-prefixes=SSE,SSE4
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-- -mcpu=x86-64-v3 %s | FileCheck %s --check-prefixes=AVX2
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-- -mcpu=x86-64-v4 %s | FileCheck %s --check-prefixes=AVX512
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; PR124993 - ensure scalarized CTLZ calls remain scalarized unless there is a definite cost improvement, the cost of scalarization was being over estimated.
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define <2 x i64> @scalarize_ctlz_v2i64(<2 x i64> %v) {
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; SSE-LABEL: define <2 x i64> @scalarize_ctlz_v2i64(
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; SSE-SAME: <2 x i64> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
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; SSE-NEXT: [[V0:%.*]] = extractelement <2 x i64> [[V]], i64 0
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; SSE-NEXT: [[V1:%.*]] = extractelement <2 x i64> [[V]], i64 1
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; SSE-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; SSE-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; SSE-NEXT: [[R0:%.*]] = insertelement <2 x i64> poison, i64 [[C0]], i64 0
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; SSE-NEXT: [[R1:%.*]] = insertelement <2 x i64> [[R0]], i64 [[C1]], i64 1
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; SSE-NEXT: ret <2 x i64> [[R1]]
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;
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; AVX2-LABEL: define <2 x i64> @scalarize_ctlz_v2i64(
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; AVX2-SAME: <2 x i64> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
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; AVX2-NEXT: [[V0:%.*]] = extractelement <2 x i64> [[V]], i64 0
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; AVX2-NEXT: [[V1:%.*]] = extractelement <2 x i64> [[V]], i64 1
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; AVX2-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; AVX2-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; AVX2-NEXT: [[R0:%.*]] = insertelement <2 x i64> poison, i64 [[C0]], i64 0
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; AVX2-NEXT: [[R1:%.*]] = insertelement <2 x i64> [[R0]], i64 [[C1]], i64 1
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; AVX2-NEXT: ret <2 x i64> [[R1]]
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;
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; AVX512-LABEL: define <2 x i64> @scalarize_ctlz_v2i64(
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; AVX512-SAME: <2 x i64> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
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; AVX512-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[V]], i1 false)
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; AVX512-NEXT: ret <2 x i64> [[TMP1]]
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;
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%v0 = extractelement <2 x i64> %v, i64 0
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%v1 = extractelement <2 x i64> %v, i64 1
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%c0 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v0, i1 false)
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%c1 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v1, i1 false)
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%r0 = insertelement <2 x i64> poison, i64 %c0, i64 0
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%r1 = insertelement <2 x i64> %r0, i64 %c1, i64 1
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ret <2 x i64> %r1
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}
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define <4 x i64> @scalarize_ctlz_v4i64(<4 x i64> %v) {
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; SSE-LABEL: define <4 x i64> @scalarize_ctlz_v4i64(
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; SSE-SAME: <4 x i64> [[V:%.*]]) #[[ATTR0]] {
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; SSE-NEXT: [[V0:%.*]] = extractelement <4 x i64> [[V]], i64 0
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; SSE-NEXT: [[V1:%.*]] = extractelement <4 x i64> [[V]], i64 1
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; SSE-NEXT: [[V2:%.*]] = extractelement <4 x i64> [[V]], i64 2
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; SSE-NEXT: [[V3:%.*]] = extractelement <4 x i64> [[V]], i64 3
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; SSE-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; SSE-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; SSE-NEXT: [[C2:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V2]], i1 false)
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; SSE-NEXT: [[C3:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V3]], i1 false)
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; SSE-NEXT: [[R0:%.*]] = insertelement <4 x i64> poison, i64 [[C0]], i64 0
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; SSE-NEXT: [[R1:%.*]] = insertelement <4 x i64> [[R0]], i64 [[C1]], i64 1
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; SSE-NEXT: [[R2:%.*]] = insertelement <4 x i64> [[R1]], i64 [[C2]], i64 2
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; SSE-NEXT: [[R3:%.*]] = insertelement <4 x i64> [[R2]], i64 [[C3]], i64 3
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; SSE-NEXT: ret <4 x i64> [[R3]]
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;
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; AVX2-LABEL: define <4 x i64> @scalarize_ctlz_v4i64(
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; AVX2-SAME: <4 x i64> [[V:%.*]]) #[[ATTR0]] {
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; AVX2-NEXT: [[V0:%.*]] = extractelement <4 x i64> [[V]], i64 0
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; AVX2-NEXT: [[V1:%.*]] = extractelement <4 x i64> [[V]], i64 1
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; AVX2-NEXT: [[V2:%.*]] = extractelement <4 x i64> [[V]], i64 2
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; AVX2-NEXT: [[V3:%.*]] = extractelement <4 x i64> [[V]], i64 3
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; AVX2-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; AVX2-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; AVX2-NEXT: [[C2:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V2]], i1 false)
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; AVX2-NEXT: [[C3:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V3]], i1 false)
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; AVX2-NEXT: [[R0:%.*]] = insertelement <4 x i64> poison, i64 [[C0]], i64 0
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; AVX2-NEXT: [[R1:%.*]] = insertelement <4 x i64> [[R0]], i64 [[C1]], i64 1
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; AVX2-NEXT: [[R2:%.*]] = insertelement <4 x i64> [[R1]], i64 [[C2]], i64 2
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; AVX2-NEXT: [[R3:%.*]] = insertelement <4 x i64> [[R2]], i64 [[C3]], i64 3
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; AVX2-NEXT: ret <4 x i64> [[R3]]
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;
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; AVX512-LABEL: define <4 x i64> @scalarize_ctlz_v4i64(
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; AVX512-SAME: <4 x i64> [[V:%.*]]) #[[ATTR0]] {
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; AVX512-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> [[V]], i1 false)
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; AVX512-NEXT: ret <4 x i64> [[TMP1]]
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;
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%v0 = extractelement <4 x i64> %v, i64 0
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%v1 = extractelement <4 x i64> %v, i64 1
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%v2 = extractelement <4 x i64> %v, i64 2
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%v3 = extractelement <4 x i64> %v, i64 3
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%c0 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v0, i1 false)
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%c1 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v1, i1 false)
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%c2 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v2, i1 false)
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%c3 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v3, i1 false)
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%r0 = insertelement <4 x i64> poison, i64 %c0, i64 0
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%r1 = insertelement <4 x i64> %r0, i64 %c1, i64 1
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%r2 = insertelement <4 x i64> %r1, i64 %c2, i64 2
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%r3 = insertelement <4 x i64> %r2, i64 %c3, i64 3
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ret <4 x i64> %r3
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}
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define <8 x i64> @scalarize_ctlz_v8i64(<8 x i64> %v) {
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; SSE2-LABEL: define <8 x i64> @scalarize_ctlz_v8i64(
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; SSE2-SAME: <8 x i64> [[V:%.*]]) #[[ATTR0]] {
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; SSE2-NEXT: [[TMP1:%.*]] = shufflevector <8 x i64> [[V]], <8 x i64> poison, <2 x i32> <i32 0, i32 1>
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; SSE2-NEXT: [[TMP2:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[TMP1]], i1 false)
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; SSE2-NEXT: [[TMP3:%.*]] = shufflevector <8 x i64> [[V]], <8 x i64> poison, <2 x i32> <i32 2, i32 3>
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; SSE2-NEXT: [[TMP4:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[TMP3]], i1 false)
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; SSE2-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[V]], <8 x i64> poison, <2 x i32> <i32 4, i32 5>
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; SSE2-NEXT: [[TMP6:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[TMP5]], i1 false)
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; SSE2-NEXT: [[TMP7:%.*]] = shufflevector <8 x i64> [[V]], <8 x i64> poison, <2 x i32> <i32 6, i32 7>
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; SSE2-NEXT: [[TMP8:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[TMP7]], i1 false)
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; SSE2-NEXT: [[TMP9:%.*]] = shufflevector <2 x i64> [[TMP2]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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; SSE2-NEXT: [[TMP10:%.*]] = shufflevector <2 x i64> [[TMP4]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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; SSE2-NEXT: [[R31:%.*]] = shufflevector <8 x i64> [[TMP9]], <8 x i64> [[TMP10]], <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 6, i32 7>
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; SSE2-NEXT: [[TMP11:%.*]] = shufflevector <2 x i64> [[TMP6]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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; SSE2-NEXT: [[R52:%.*]] = shufflevector <8 x i64> [[R31]], <8 x i64> [[TMP11]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 6, i32 7>
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; SSE2-NEXT: [[TMP12:%.*]] = shufflevector <2 x i64> [[TMP8]], <2 x i64> poison, <8 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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; SSE2-NEXT: [[R73:%.*]] = shufflevector <8 x i64> [[R52]], <8 x i64> [[TMP12]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
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; SSE2-NEXT: ret <8 x i64> [[R73]]
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;
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; SSE4-LABEL: define <8 x i64> @scalarize_ctlz_v8i64(
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; SSE4-SAME: <8 x i64> [[V:%.*]]) #[[ATTR0]] {
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; SSE4-NEXT: [[V0:%.*]] = extractelement <8 x i64> [[V]], i64 0
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; SSE4-NEXT: [[V1:%.*]] = extractelement <8 x i64> [[V]], i64 1
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; SSE4-NEXT: [[V2:%.*]] = extractelement <8 x i64> [[V]], i64 2
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; SSE4-NEXT: [[V3:%.*]] = extractelement <8 x i64> [[V]], i64 3
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; SSE4-NEXT: [[V4:%.*]] = extractelement <8 x i64> [[V]], i64 4
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; SSE4-NEXT: [[V5:%.*]] = extractelement <8 x i64> [[V]], i64 5
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; SSE4-NEXT: [[V6:%.*]] = extractelement <8 x i64> [[V]], i64 6
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; SSE4-NEXT: [[V7:%.*]] = extractelement <8 x i64> [[V]], i64 7
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; SSE4-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; SSE4-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; SSE4-NEXT: [[C2:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V2]], i1 false)
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; SSE4-NEXT: [[C3:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V3]], i1 false)
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; SSE4-NEXT: [[C4:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V4]], i1 false)
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; SSE4-NEXT: [[C5:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V5]], i1 false)
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; SSE4-NEXT: [[C6:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V6]], i1 false)
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; SSE4-NEXT: [[C7:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V7]], i1 false)
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; SSE4-NEXT: [[R0:%.*]] = insertelement <8 x i64> poison, i64 [[C0]], i64 0
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; SSE4-NEXT: [[R1:%.*]] = insertelement <8 x i64> [[R0]], i64 [[C1]], i64 1
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; SSE4-NEXT: [[R2:%.*]] = insertelement <8 x i64> [[R1]], i64 [[C2]], i64 2
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; SSE4-NEXT: [[R3:%.*]] = insertelement <8 x i64> [[R2]], i64 [[C3]], i64 3
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; SSE4-NEXT: [[R4:%.*]] = insertelement <8 x i64> [[R3]], i64 [[C4]], i64 4
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; SSE4-NEXT: [[R5:%.*]] = insertelement <8 x i64> [[R4]], i64 [[C5]], i64 5
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; SSE4-NEXT: [[R6:%.*]] = insertelement <8 x i64> [[R5]], i64 [[C6]], i64 6
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; SSE4-NEXT: [[R7:%.*]] = insertelement <8 x i64> [[R6]], i64 [[C7]], i64 7
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; SSE4-NEXT: ret <8 x i64> [[R7]]
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;
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; AVX2-LABEL: define <8 x i64> @scalarize_ctlz_v8i64(
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; AVX2-SAME: <8 x i64> [[V:%.*]]) #[[ATTR0]] {
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; AVX2-NEXT: [[V0:%.*]] = extractelement <8 x i64> [[V]], i64 0
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; AVX2-NEXT: [[V1:%.*]] = extractelement <8 x i64> [[V]], i64 1
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; AVX2-NEXT: [[V2:%.*]] = extractelement <8 x i64> [[V]], i64 2
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; AVX2-NEXT: [[V3:%.*]] = extractelement <8 x i64> [[V]], i64 3
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; AVX2-NEXT: [[V4:%.*]] = extractelement <8 x i64> [[V]], i64 4
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; AVX2-NEXT: [[V5:%.*]] = extractelement <8 x i64> [[V]], i64 5
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; AVX2-NEXT: [[V6:%.*]] = extractelement <8 x i64> [[V]], i64 6
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; AVX2-NEXT: [[V7:%.*]] = extractelement <8 x i64> [[V]], i64 7
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; AVX2-NEXT: [[C0:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V0]], i1 false)
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; AVX2-NEXT: [[C1:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V1]], i1 false)
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; AVX2-NEXT: [[C2:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V2]], i1 false)
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; AVX2-NEXT: [[C3:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V3]], i1 false)
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; AVX2-NEXT: [[C4:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V4]], i1 false)
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; AVX2-NEXT: [[C5:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V5]], i1 false)
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; AVX2-NEXT: [[C6:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V6]], i1 false)
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; AVX2-NEXT: [[C7:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[V7]], i1 false)
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; AVX2-NEXT: [[R0:%.*]] = insertelement <8 x i64> poison, i64 [[C0]], i64 0
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; AVX2-NEXT: [[R1:%.*]] = insertelement <8 x i64> [[R0]], i64 [[C1]], i64 1
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; AVX2-NEXT: [[R2:%.*]] = insertelement <8 x i64> [[R1]], i64 [[C2]], i64 2
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; AVX2-NEXT: [[R3:%.*]] = insertelement <8 x i64> [[R2]], i64 [[C3]], i64 3
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; AVX2-NEXT: [[R4:%.*]] = insertelement <8 x i64> [[R3]], i64 [[C4]], i64 4
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; AVX2-NEXT: [[R5:%.*]] = insertelement <8 x i64> [[R4]], i64 [[C5]], i64 5
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; AVX2-NEXT: [[R6:%.*]] = insertelement <8 x i64> [[R5]], i64 [[C6]], i64 6
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; AVX2-NEXT: [[R7:%.*]] = insertelement <8 x i64> [[R6]], i64 [[C7]], i64 7
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; AVX2-NEXT: ret <8 x i64> [[R7]]
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;
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; AVX512-LABEL: define <8 x i64> @scalarize_ctlz_v8i64(
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; AVX512-SAME: <8 x i64> [[V:%.*]]) #[[ATTR0]] {
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; AVX512-NEXT: [[TMP1:%.*]] = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> [[V]], i1 false)
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; AVX512-NEXT: ret <8 x i64> [[TMP1]]
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;
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%v0 = extractelement <8 x i64> %v, i64 0
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%v1 = extractelement <8 x i64> %v, i64 1
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%v2 = extractelement <8 x i64> %v, i64 2
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%v3 = extractelement <8 x i64> %v, i64 3
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%v4 = extractelement <8 x i64> %v, i64 4
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%v5 = extractelement <8 x i64> %v, i64 5
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%v6 = extractelement <8 x i64> %v, i64 6
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%v7 = extractelement <8 x i64> %v, i64 7
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%c0 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v0, i1 false)
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%c1 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v1, i1 false)
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%c2 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v2, i1 false)
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%c3 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v3, i1 false)
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%c4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v4, i1 false)
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%c5 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v5, i1 false)
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%c6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v6, i1 false)
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%c7 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %v7, i1 false)
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%r0 = insertelement <8 x i64> poison, i64 %c0, i64 0
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%r1 = insertelement <8 x i64> %r0, i64 %c1, i64 1
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%r2 = insertelement <8 x i64> %r1, i64 %c2, i64 2
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%r3 = insertelement <8 x i64> %r2, i64 %c3, i64 3
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%r4 = insertelement <8 x i64> %r3, i64 %c4, i64 4
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%r5 = insertelement <8 x i64> %r4, i64 %c5, i64 5
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%r6 = insertelement <8 x i64> %r5, i64 %c6, i64 6
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%r7 = insertelement <8 x i64> %r6, i64 %c7, i64 7
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ret <8 x i64> %r7
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}

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