We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 9ca5da5 commit 502c437Copy full SHA for 502c437
llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
@@ -1461,8 +1461,9 @@ bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
1461
1462
unsigned NumElts = getLoadStoreVectorNumElts(N);
1463
SmallVector<SDValue, 16> Ops;
1464
- for (unsigned I : llvm::seq(NumElts))
1465
- Ops.append({N->getOperand(I + 1)});
+ // Append the operands from 1 to NumElts, inclusive
+ const SDUse *FirstStoredVal = N->ops().begin() + 1;
1466
+ Ops.append(FirstStoredVal, FirstStoredVal + NumElts);
1467
SDValue N2 = N->getOperand(NumElts + 1);
1468
unsigned ToTypeWidth = TotalWidth / NumElts;
1469
0 commit comments