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PanTao2 · PanTao2 · commit 5076be45b0d0 · 2025-11-27T13:07:29.000+08:00
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -2497,7 +2497,9 @@ bool AArch64InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
           .addMemOperand(*MI.memoperands_begin());
     }
   }
-  // To match MSVC
+  // To match MSVC. Unlike x86_64 which uses xor instruction to mix the cookie,
+  // we use sub instruction to mix the cookie on aarch64 for keeping the
+  // existing inlining logic intact.
   if (Subtarget.getTargetTriple().isOSMSVCRT() &&
       !Subtarget.getTargetLowering()
            ->getTargetMachine()

Original file line number	Diff line number	Diff line change
`@@ -2497,7 +2497,9 @@ bool AArch64InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {`
`2497`	`2497`	`.addMemOperand(*MI.memoperands_begin());`
`2498`	`2498`	`}`
`2499`	`2499`	`}`
`2500`		`- // To match MSVC`
	`2500`	`+ // To match MSVC. Unlike x86_64 which uses xor instruction to mix the cookie,`
	`2501`	`+ // we use sub instruction to mix the cookie on aarch64 for keeping the`
	`2502`	`+ // existing inlining logic intact.`
`2501`	`2503`	`if (Subtarget.getTargetTriple().isOSMSVCRT() &&`
`2502`	`2504`	`!Subtarget.getTargetLowering()`
`2503`	`2505`	`->getTargetMachine()`