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Restructure files and add negative tests
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‎clang/include/clang/Basic/arm_sme.td‎

Lines changed: 82 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -289,6 +289,88 @@ multiclass ZAFPOuterProd<string n_suffix> {
289289
defm SVMOPA : ZAFPOuterProd<"mopa">;
290290
defm SVMOPS : ZAFPOuterProd<"mops">;
291291

292+
////////////////////////////////////////////////////////////////////////////////
293+
// SME2 - FMOP4A, FMOP4S, BFMOP4A, BFMOP4S
294+
295+
multiclass MOP4<string mode, string za, string t, string i, list<ImmCheck> checks> {
296+
def _1x1 : Inst<"svmop4" # mode # "[_1x1]_" # za # "[_{d}_{d}]", "vidd", t, MergeNone, i # "_1x1", [IsInOutZA, IsStreaming], checks>;
297+
}
298+
299+
let SMETargetGuard = "sme2,sme-mop4" in {
300+
301+
defm SVFMOP4A_HtoS : MOP4<"a", "za32", "hb", "aarch64_sme_mop4a_wide", [ImmCheck<0, ImmCheck0_3>]>;
302+
defm SVFMOP4S_HtoS : MOP4<"s", "za32", "hb", "aarch64_sme_mop4s_wide", [ImmCheck<0, ImmCheck0_3>]>;
303+
defm SVFMOP4A_S : MOP4<"a", "za32", "f", "aarch64_sme_mop4a", [ImmCheck<0, ImmCheck0_3>]>;
304+
defm SVFMOP4S_S : MOP4<"s", "za32", "f", "aarch64_sme_mop4s", [ImmCheck<0, ImmCheck0_3>]>;
305+
}
306+
307+
let SMETargetGuard = "sme2,sme-mop4,sme-f64f64" in {
308+
defm SVFMOP4A_D : MOP4<"a", "za64", "d", "aarch64_sme_mop4a", [ImmCheck<0, ImmCheck0_7>]>;
309+
defm SVFMOP4S_D : MOP4<"s", "za64", "d", "aarch64_sme_mop4s", [ImmCheck<0, ImmCheck0_7>]>;
310+
}
311+
312+
let SMETargetGuard = "sme2,sme-mop4,sme-f16f16" in {
313+
defm SVFMOP4A_H : MOP4<"a", "za16", "h", "aarch64_sme_mop4a", [ImmCheck<0, ImmCheck0_1>]>;
314+
defm SVFMOP4S_H : MOP4<"s", "za16", "h", "aarch64_sme_mop4s", [ImmCheck<0, ImmCheck0_1>]>;
315+
}
316+
317+
let SMETargetGuard = "sme2,sme-mop4,sme-b16b16" in {
318+
defm SVBMOP4A_H : MOP4<"a", "za16", "b", "aarch64_sme_mop4a", [ImmCheck<0, ImmCheck0_1>]>;
319+
defm SVBMOP4S_H : MOP4<"s", "za16", "b", "aarch64_sme_mop4s", [ImmCheck<0, ImmCheck0_1>]>;
320+
}
321+
322+
////////////////////////////////////////////////////////////////////////////////
323+
// SME2 - SMOP4A, SMOP4S, UMOP4A, UMOP4S
324+
325+
let SMETargetGuard = "sme2,sme-mop4" in {
326+
defm SVSMOP4A_H : MOP4<"a", "za32", "cs", "aarch64_sme_smop4a_wide", [ImmCheck<0, ImmCheck0_3>]>;
327+
defm SVSMOP4S_H : MOP4<"s", "za32", "cs", "aarch64_sme_smop4s_wide", [ImmCheck<0, ImmCheck0_3>]>;
328+
329+
defm SVUMOP4A_H : MOP4<"a", "za32", "UcUs", "aarch64_sme_umop4a_wide", [ImmCheck<0, ImmCheck0_3>]>;
330+
defm SVUMOP4S_H : MOP4<"s", "za32", "UcUs", "aarch64_sme_umop4s_wide", [ImmCheck<0, ImmCheck0_3>]>;
331+
}
332+
333+
let SMETargetGuard = "sme2,sme-mop4,sme-i16i64" in {
334+
defm SVSMOP4A_HtoD : MOP4<"a", "za64", "s", "aarch64_sme_smop4a_za64_wide", [ImmCheck<0, ImmCheck0_7>]>;
335+
defm SVSMOP4S_HtoD : MOP4<"s", "za64", "s", "aarch64_sme_smop4s_za64_wide", [ImmCheck<0, ImmCheck0_7>]>;
336+
337+
defm SVUMOP4A_HtoD : MOP4<"a", "za64", "Us", "aarch64_sme_umop4a_za64_wide", [ImmCheck<0, ImmCheck0_7>]>;
338+
defm SVUMOP4S_HtoD : MOP4<"s", "za64", "Us", "aarch64_sme_umop4s_za64_wide", [ImmCheck<0, ImmCheck0_7>]>;
339+
}
340+
341+
////////////////////////////////////////////////////////////////////////////////
342+
// SME2 - SUMOP4A, SUMOP4S, USMOP4A, USMOP4S
343+
344+
multiclass SUMOP4<string mode, string za, string t, string i, list<ImmCheck> checks> {
345+
def _1x1 : SInst<"svmop4" # mode # "[_1x1]_" # za # "[_{d}_{3}]",
346+
"vidu", t, MergeNone, "aarch64_sme_sumop4" # mode # i # "_wide_1x1",
347+
[IsStreaming, IsInOutZA],
348+
checks>;
349+
}
350+
351+
multiclass USMOP4<string mode, string za, string t, string i, list<ImmCheck> checks> {
352+
def _1x1 : SInst<"svmop4" # mode # "[_1x1]_" # za # "[_{d}_{3}]",
353+
"vidx", t, MergeNone, "aarch64_sme_usmop4" # mode # i # "_wide_1x1",
354+
[IsStreaming, IsInOutZA],
355+
checks>;
356+
}
357+
358+
let SMETargetGuard = "sme2,sme-mop4" in {
359+
defm SVSUMOP4A_S : SUMOP4<"a", "za32", "c", "", [ImmCheck<0, ImmCheck0_3>]>;
360+
defm SVSUMOP4S_S : SUMOP4<"s", "za32", "c", "", [ImmCheck<0, ImmCheck0_3>]>;
361+
362+
defm SVUSMOP4A_S : USMOP4<"a", "za32", "Uc", "", [ImmCheck<0, ImmCheck0_3>]>;
363+
defm SVUSMOP4S_S : USMOP4<"s", "za32", "Uc", "", [ImmCheck<0, ImmCheck0_3>]>;
364+
}
365+
366+
let SMETargetGuard = "sme2,sme-mop4,sme-i16i64" in {
367+
defm SVSUMOP4A_D : SUMOP4<"a", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
368+
defm SVSUMOP4S_D : SUMOP4<"s", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
369+
370+
defm SVUSMOP4A_D : USMOP4<"a", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
371+
defm SVUSMOP4S_D : USMOP4<"s", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
372+
}
373+
292374
////////////////////////////////////////////////////////////////////////////////
293375
// SME2 - ADD, SUB
294376

@@ -376,24 +458,6 @@ let SMETargetGuard = "sme2" in {
376458
// Outer product and accumulate/subtract
377459
//
378460

379-
multiclass MOP4<string name, string n, string t, string i, string wide, list<ImmCheck> checks> {
380-
def NAME # "_1x1" : Inst<"svmop4" # name # "_1x1_" # n # "[_{d}_{d}]", "vidd", t, MergeNone, i # wide # "_1x1", [IsInOutZA, IsStreaming], checks>;
381-
}
382-
383-
multiclass SUMOP4<string s, string za, string t, string i, list<ImmCheck> checks> {
384-
def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{d}_{3}]",
385-
"vidu", t, MergeNone, "aarch64_sme_sumop4" # s # i # "_wide_1x1",
386-
[IsStreaming, IsInOutZA],
387-
checks>;
388-
}
389-
390-
multiclass USMOP4<string s, string za, string t, string i, list<ImmCheck> checks> {
391-
def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{d}_{3}]",
392-
"vidx", t, MergeNone, "aarch64_sme_usmop4" # s # i # "_wide_1x1",
393-
[IsStreaming, IsInOutZA],
394-
checks>;
395-
}
396-
397461
let SMETargetGuard = "sme2" in {
398462
def SVSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "s", MergeNone, "aarch64_sme_smopa_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>;
399463
def SVUSMOPA : Inst<"svmopa_za32[_{d}]_m", "viPPdd", "Us", MergeNone, "aarch64_sme_umopa_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>;
@@ -405,25 +469,6 @@ let SMETargetGuard = "sme2" in {
405469

406470
def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, "aarch64_sme_bmops_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>;
407471

408-
defm SVSMOP4A_H : MOP4<"a", "za32", "cs", "aarch64_sme_smop4a", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
409-
defm SVSMOP4S_H : MOP4<"s", "za32", "cs", "aarch64_sme_smop4s", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
410-
411-
defm SVUMOP4A_H : MOP4<"a", "za32", "UcUs", "aarch64_sme_umop4a", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
412-
defm SVUMOP4S_H : MOP4<"s", "za32", "UcUs", "aarch64_sme_umop4s", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
413-
414-
defm SVFMOP4A_HtoS : MOP4<"a", "za32", "h", "aarch64_sme_mop4a", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
415-
defm SVFMOP4S_HtoS : MOP4<"s", "za32", "h", "aarch64_sme_mop4s", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
416-
defm SVFMOP4A_S : MOP4<"a", "za32", "f", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_3>]>;
417-
defm SVFMOP4S_S : MOP4<"s", "za32", "f", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_3>]>;
418-
419-
defm SVBMOP4A_S : MOP4<"a", "za32", "b", "aarch64_sme_mop4a", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
420-
defm SVBMOP4S_S : MOP4<"s", "za32", "b", "aarch64_sme_mop4s", "_wide", [ImmCheck<0, ImmCheck0_3>]>;
421-
422-
defm SVSUMOP4A_S : SUMOP4<"a", "za32", "cs", "", [ImmCheck<0, ImmCheck0_3>]>;
423-
defm SVSUMOP4S_S : SUMOP4<"s", "za32", "cs", "", [ImmCheck<0, ImmCheck0_3>]>;
424-
defm SVUSMOP4A_S : USMOP4<"a", "za32", "UcUs", "", [ImmCheck<0, ImmCheck0_3>]>;
425-
defm SVUSMOP4S_S : USMOP4<"s", "za32", "UcUs", "", [ImmCheck<0, ImmCheck0_3>]>;
426-
427472
// VERTICAL DOT-PRODUCT
428473
def SVVDOT_LANE_ZA32_VG1x2_S : Inst<"svvdot_lane_za32[_{d}]_vg1x2", "vm2di", "s", MergeNone, "aarch64_sme_svdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>;
429474
def SVVDOT_LANE_ZA32_VG1x4_S : Inst<"svvdot_lane_za32[_{d}]_vg1x4", "vm4di", "c", MergeNone, "aarch64_sme_svdot_lane_za32_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>;
@@ -474,15 +519,6 @@ let SMETargetGuard = "sme2" in {
474519
}
475520

476521
let SMETargetGuard = "sme2,sme-i16i64" in {
477-
defm SVSMOP4A_HtoD : MOP4<"a", "za64", "s", "aarch64_sme_smop4a_za64", "_wide", [ImmCheck<0, ImmCheck0_7>]>;
478-
defm SVSMOP4S_HtoD : MOP4<"s", "za64", "s", "aarch64_sme_smop4s_za64", "_wide", [ImmCheck<0, ImmCheck0_7>]>;
479-
defm SVUMOP4A_HtoD : MOP4<"a", "za64", "Us", "aarch64_sme_umop4a_za64", "_wide", [ImmCheck<0, ImmCheck0_7>]>;
480-
defm SVUMOP4S_HtoD : MOP4<"s", "za64", "Us", "aarch64_sme_umop4s_za64", "_wide", [ImmCheck<0, ImmCheck0_7>]>;
481-
defm SVSUMOP4A_D : SUMOP4<"a", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
482-
defm SVSUMOP4S_D : SUMOP4<"s", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
483-
defm SVUSMOP4A_D : USMOP4<"a", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
484-
defm SVUSMOP4S_D : USMOP4<"s", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>]>;
485-
486522
def SVVDOT_LANE_ZA64_VG1x4_S : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "s", MergeNone, "aarch64_sme_svdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>;
487523
def SVVDOT_LANE_ZA64_VG1x4_U : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "Us", MergeNone, "aarch64_sme_uvdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>;
488524

@@ -519,9 +555,6 @@ let SMETargetGuard = "sme2" in {
519555
}
520556

521557
let SMETargetGuard = "sme2,sme-f64f64" in {
522-
defm SVFMOP4A_D : MOP4<"a", "za64", "d", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_7>]>;
523-
defm SVFMOP4S_D : MOP4<"s", "za64", "d", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_7>]>;
524-
525558
def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
526559
def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
527560
def SVMLS_MULTI_VG1x2_F64 : Inst<"svmls_za64[_{d}]_vg1x2", "vm22", "d", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>;
@@ -539,9 +572,6 @@ let SMETargetGuard = "sme2,sme-f64f64" in {
539572
}
540573

541574
let SMETargetGuard = "sme-f16f16" in {
542-
defm SVFMOP4A_H : MOP4<"a", "za16", "h", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_1>]>;
543-
defm SVFMOP4S_H : MOP4<"s", "za16", "h", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_1>]>;
544-
545575
def SVMLA_MULTI_VG1x2_F16 : Inst<"svmla_za16[_f16]_vg1x2", "vm22", "h", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
546576
def SVMLA_MULTI_VG1x4_F16 : Inst<"svmla_za16[_f16]_vg1x4", "vm44", "h", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
547577
def SVMLS_MULTI_VG1x2_F16 : Inst<"svmls_za16[_f16]_vg1x2", "vm22", "h", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>;
@@ -559,9 +589,6 @@ let SMETargetGuard = "sme-f16f16" in {
559589
}
560590

561591
let SMETargetGuard = "sme-b16b16" in {
562-
defm SVBMOP4A_H : MOP4<"a", "za16", "bf", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_1>]>;
563-
defm SVBMOP4S_H : MOP4<"s", "za16", "bf", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_1>]>;
564-
565592
def SVMLA_MULTI_VG1x2_BF16 : Inst<"svmla_za16[_bf16]_vg1x2", "vm22", "b", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
566593
def SVMLA_MULTI_VG1x4_BF16 : Inst<"svmla_za16[_bf16]_vg1x4", "vm44", "b", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
567594
def SVMLS_MULTI_VG1x2_BF16 : Inst<"svmls_za16[_bf16]_vg1x2", "vm22", "b", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>;

‎clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_1x1.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
22

33
// REQUIRES: aarch64-registered-target
4-
// RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
5-
// RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
6-
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
7-
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
8-
// RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
4+
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
5+
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
6+
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
7+
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
8+
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme-mop4 -target-feature +sme-f16f16 -target-feature +sme-i16i64 -target-feature +sme-b16b16 -target-feature +sme-f64f64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
99

1010

1111
#include <arm_sme.h>

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