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[AMDGPU] Add gfx1250 v_fmac_f64 implementation (#148725)
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‎llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -639,6 +639,7 @@ bool isMAC(unsigned Opc) {
639639
Opc == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 ||
640640
Opc == AMDGPU::V_MAC_F16_e64_vi ||
641641
Opc == AMDGPU::V_FMAC_F64_e64_gfx90a ||
642+
Opc == AMDGPU::V_FMAC_F64_e64_gfx12 ||
642643
Opc == AMDGPU::V_FMAC_F32_e64_gfx10 ||
643644
Opc == AMDGPU::V_FMAC_F32_e64_gfx11 ||
644645
Opc == AMDGPU::V_FMAC_F32_e64_gfx12 ||

‎llvm/lib/Target/AMDGPU/VOP2Instructions.td

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -175,10 +175,14 @@ multiclass VOP2Inst_e64<string opName,
175175
def _e64 : VOP3InstBase <opName, P, node, 1>,
176176
Commutable_REV<revOp#"_e64", !eq(revOp, opName)>;
177177

178-
let SubtargetPredicate = isGFX11Plus in {
179-
if P.HasExtVOP3DPP then
180-
def _e64_dpp : VOP3_DPP_Pseudo <opName, P>;
181-
} // End SubtargetPredicate = isGFX11Plus
178+
if P.HasExtVOP3DPP then
179+
def _e64_dpp : VOP3_DPP_Pseudo <opName, P> {
180+
let SubtargetPredicate = isGFX11Plus;
181+
}
182+
else if P.HasExt64BitDPP then
183+
def _e64_dpp : VOP3_DPP_Pseudo <opName, P> {
184+
let OtherPredicates = [HasDPALU_DPP];
185+
}
182186
}
183187

184188
multiclass VOP2Inst_e64_VOPD<string opName,
@@ -1492,7 +1496,9 @@ class Base_VOP2_DPP16<bits<6> op, VOP2_DPP_Pseudo ps,
14921496
VOP2_DPP<op, ps, opName, p, 1> {
14931497
let AssemblerPredicate = HasDPP16;
14941498
let SubtargetPredicate = ps.SubtargetPredicate;
1495-
let OtherPredicates = ps.OtherPredicates;
1499+
let OtherPredicates = !listconcat(ps.OtherPredicates,
1500+
!if(p.HasExt64BitDPP, [HasDPALU_DPP], []),
1501+
!if(ps.Pfl.IsRealTrue16, [UseRealTrue16Insts], []));
14961502
}
14971503

14981504
class VOP2_DPP16<bits<6> op, VOP2_DPP_Pseudo ps, int subtarget,
@@ -1832,6 +1838,9 @@ let SubtargetPredicate = isGFX12Plus in {
18321838
V_SUBBREV_U32_e32, V_SUBREV_CO_CI_U32_e32_gfx12, "v_subrev_co_ci_u32">;
18331839
} // End SubtargetPredicate = isGFX12Plus
18341840

1841+
let SubtargetPredicate = HasFmacF64Inst in
1842+
defm V_FMAC_F64 : VOP2_Real_FULL<GFX12Gen, 0x17>;
1843+
18351844
defm V_FMAMK_F64 : VOP2Only_Real_MADK64<GFX1250Gen, 0x23>;
18361845
defm V_FMAAK_F64 : VOP2Only_Real_MADK64<GFX1250Gen, 0x24>;
18371846

‎llvm/test/CodeGen/AMDGPU/fma.f64.ll

Lines changed: 23 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,17 @@
1-
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
2-
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
3-
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx90a -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,GFX90A %s
4-
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,SIGFX11 %s
1+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
2+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
3+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx90a -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s
4+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=FUNC,GCN,FMA_F64 %s
5+
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1250 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=FUNC,GCN,FMAC_F64 %s
56

67
declare double @llvm.fma.f64(double, double, double) nounwind readnone
78
declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
89
declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
910
declare double @llvm.fabs.f64(double) nounwind readnone
1011

1112
; FUNC-LABEL: {{^}}fma_f64:
12-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
13-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
13+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
14+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
1415
define amdgpu_kernel void @fma_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
1516
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
1617
%r0 = load double, ptr addrspace(1) %in1
@@ -22,10 +23,10 @@ define amdgpu_kernel void @fma_f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
2223
}
2324

2425
; FUNC-LABEL: {{^}}fma_v2f64:
25-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
26-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
27-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
28-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
26+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
27+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
28+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
29+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
2930
define amdgpu_kernel void @fma_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
3031
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
3132
%r0 = load <2 x double>, ptr addrspace(1) %in1
@@ -37,14 +38,14 @@ define amdgpu_kernel void @fma_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in
3738
}
3839

3940
; FUNC-LABEL: {{^}}fma_v4f64:
40-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
41-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
42-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
43-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
44-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
45-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
46-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
47-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
41+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
42+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
43+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
44+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
45+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
46+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
47+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
48+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
4849
define amdgpu_kernel void @fma_v4f64(ptr addrspace(1) %out, ptr addrspace(1) %in1,
4950
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
5051
%r0 = load <4 x double>, ptr addrspace(1) %in1
@@ -176,8 +177,8 @@ define amdgpu_kernel void @fma_f64_abs_neg_src2(ptr addrspace(1) %out, ptr addrs
176177
}
177178

178179
; FUNC-LABEL: {{^}}fma_f64_lit_src0:
179-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
180-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
180+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
181+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
181182
define amdgpu_kernel void @fma_f64_lit_src0(ptr addrspace(1) %out,
182183
ptr addrspace(1) %in2, ptr addrspace(1) %in3) {
183184
%r1 = load double, ptr addrspace(1) %in2
@@ -188,8 +189,8 @@ define amdgpu_kernel void @fma_f64_lit_src0(ptr addrspace(1) %out,
188189
}
189190

190191
; FUNC-LABEL: {{^}}fma_f64_lit_src1:
191-
; SIGFX11: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
192-
; GFX90A: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
192+
; FMA_F64: v_fma_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
193+
; FMAC_F64: v_fmac_f64_e32 {{v\[[0-9]+:[0-9]+\], 2.0, v\[[0-9]+:[0-9]+\]}}
193194
define amdgpu_kernel void @fma_f64_lit_src1(ptr addrspace(1) %out, ptr addrspace(1) %in1,
194195
ptr addrspace(1) %in3) {
195196
%r0 = load double, ptr addrspace(1) %in1

‎llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s

Lines changed: 152 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,158 @@
22
// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s | FileCheck --check-prefixes=GFX1250 %s
33
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck --check-prefix=GFX1200-ERR --implicit-check-not=error: %s
44

5+
v_fmac_f64 v[4:5], v[2:3], v[4:5]
6+
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[4:5] ; encoding: [0x02,0x09,0x08,0x2e]
7+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
8+
9+
v_fmac_f64 v[254:255], v[2:3], v[4:5]
10+
// GFX1250: v_fmac_f64_e32 v[254:255], v[2:3], v[4:5] ; encoding: [0x02,0x09,0xfc,0x2f]
11+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
12+
13+
v_fmac_f64 v[4:5], v[254:255], v[4:5]
14+
// GFX1250: v_fmac_f64_e32 v[4:5], v[254:255], v[4:5] ; encoding: [0xfe,0x09,0x08,0x2e]
15+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
16+
17+
v_fmac_f64 v[4:5], vcc, v[4:5]
18+
// GFX1250: v_fmac_f64_e32 v[4:5], vcc, v[4:5] ; encoding: [0x6a,0x08,0x08,0x2e]
19+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
20+
21+
v_fmac_f64 v[4:5], exec, v[4:5]
22+
// GFX1250: v_fmac_f64_e32 v[4:5], exec, v[4:5] ; encoding: [0x7e,0x08,0x08,0x2e]
23+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
24+
25+
v_fmac_f64 v[4:5], 0, v[4:5]
26+
// GFX1250: v_fmac_f64_e32 v[4:5], 0, v[4:5] ; encoding: [0x80,0x08,0x08,0x2e]
27+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
28+
29+
v_fmac_f64 v[4:5], -1, v[4:5]
30+
// GFX1250: v_fmac_f64_e32 v[4:5], -1, v[4:5] ; encoding: [0xc1,0x08,0x08,0x2e]
31+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
32+
33+
v_fmac_f64 v[4:5], 0.5, v[4:5]
34+
// GFX1250: v_fmac_f64_e32 v[4:5], 0.5, v[4:5] ; encoding: [0xf0,0x08,0x08,0x2e]
35+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
36+
37+
v_fmac_f64 v[4:5], -4.0, v[4:5]
38+
// GFX1250: v_fmac_f64_e32 v[4:5], -4.0, v[4:5] ; encoding: [0xf7,0x08,0x08,0x2e]
39+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
40+
41+
v_fmac_f64 v[4:5], 0xaf123456, v[4:5]
42+
// GFX1250: v_fmac_f64_e32 v[4:5], 0xaf123456, v[4:5] ; encoding: [0xff,0x08,0x08,0x2e,0x56,0x34,0x12,0xaf]
43+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
44+
45+
v_fmac_f64 v[4:5], 0x3f717273, v[4:5]
46+
// GFX1250: v_fmac_f64_e32 v[4:5], 0x3f717273, v[4:5] ; encoding: [0xff,0x08,0x08,0x2e,0x73,0x72,0x71,0x3f]
47+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
48+
49+
v_fmac_f64 v[4:5], v[2:3], v[254:255]
50+
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[254:255] ; encoding: [0x02,0xfd,0x09,0x2e]
51+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
52+
53+
v_fmac_f64 v[4:5], v[2:3], v[8:9]
54+
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[8:9] ; encoding: [0x02,0x11,0x08,0x2e]
55+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
56+
57+
v_fmac_f64 v[254:255], v[2:3], v[8:9]
58+
// GFX1250: v_fmac_f64_e32 v[254:255], v[2:3], v[8:9] ; encoding: [0x02,0x11,0xfc,0x2f]
59+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
60+
61+
v_fmac_f64 v[4:5], v[254:255], v[8:9]
62+
// GFX1250: v_fmac_f64_e32 v[4:5], v[254:255], v[8:9] ; encoding: [0xfe,0x11,0x08,0x2e]
63+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
64+
65+
v_fmac_f64 v[4:5], vcc, v[8:9]
66+
// GFX1250: v_fmac_f64_e32 v[4:5], vcc, v[8:9] ; encoding: [0x6a,0x10,0x08,0x2e]
67+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
68+
69+
v_fmac_f64 v[4:5], exec, v[8:9]
70+
// GFX1250: v_fmac_f64_e32 v[4:5], exec, v[8:9] ; encoding: [0x7e,0x10,0x08,0x2e]
71+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
72+
73+
v_fmac_f64 v[4:5], 0, v[8:9]
74+
// GFX1250: v_fmac_f64_e32 v[4:5], 0, v[8:9] ; encoding: [0x80,0x10,0x08,0x2e]
75+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
76+
77+
v_fmac_f64 v[4:5], -1, v[8:9]
78+
// GFX1250: v_fmac_f64_e32 v[4:5], -1, v[8:9] ; encoding: [0xc1,0x10,0x08,0x2e]
79+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
80+
81+
v_fmac_f64 v[4:5], 0.5, v[8:9]
82+
// GFX1250: v_fmac_f64_e32 v[4:5], 0.5, v[8:9] ; encoding: [0xf0,0x10,0x08,0x2e]
83+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
84+
85+
v_fmac_f64 v[4:5], -4.0, v[8:9]
86+
// GFX1250: v_fmac_f64_e32 v[4:5], -4.0, v[8:9] ; encoding: [0xf7,0x10,0x08,0x2e]
87+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
88+
89+
v_fmac_f64 v[4:5], v[2:3], v[254:255]
90+
// GFX1250: v_fmac_f64_e32 v[4:5], v[2:3], v[254:255] ; encoding: [0x02,0xfd,0x09,0x2e]
91+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
92+
93+
v_fmac_f64 v[4:5], v[2:3], vcc
94+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], vcc ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xd5,0x00,0x00]
95+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
96+
97+
v_fmac_f64 v[4:5], v[2:3], exec
98+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], exec ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xfd,0x00,0x00]
99+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
100+
101+
v_fmac_f64 v[4:5], v[2:3], 0
102+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], 0 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x01,0x01,0x00]
103+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
104+
105+
v_fmac_f64 v[4:5], v[2:3], -1
106+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -1 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x83,0x01,0x00]
107+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
108+
109+
v_fmac_f64 v[4:5], v[2:3], 0.5
110+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], 0.5 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xe1,0x01,0x00]
111+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
112+
113+
v_fmac_f64 v[4:5], v[2:3], -4.0
114+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -4.0 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0xef,0x01,0x00]
115+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
116+
117+
v_fmac_f64 v[4:5], -v[2:3], v[8:9]
118+
// GFX1250: v_fmac_f64_e64 v[4:5], -v[2:3], v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x20]
119+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
120+
121+
v_fmac_f64 v[4:5], v[2:3], -v[8:9]
122+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], -v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x40]
123+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
124+
125+
v_fmac_f64 v[4:5], -v[2:3], -v[8:9]
126+
// GFX1250: v_fmac_f64_e64 v[4:5], -v[2:3], -v[8:9] ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x60]
127+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
128+
129+
v_fmac_f64 v[4:5], |v[2:3]|, v[8:9]
130+
// GFX1250: v_fmac_f64_e64 v[4:5], |v[2:3]|, v[8:9] ; encoding: [0x04,0x01,0x17,0xd5,0x02,0x11,0x02,0x00]
131+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
132+
133+
v_fmac_f64 v[4:5], v[2:3], |v[8:9]|
134+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], |v[8:9]| ; encoding: [0x04,0x02,0x17,0xd5,0x02,0x11,0x02,0x00]
135+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
136+
137+
v_fmac_f64 v[4:5], |v[2:3]|, |v[8:9]|
138+
// GFX1250: v_fmac_f64_e64 v[4:5], |v[2:3]|, |v[8:9]| ; encoding: [0x04,0x03,0x17,0xd5,0x02,0x11,0x02,0x00]
139+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
140+
141+
v_fmac_f64 v[4:5], v[2:3], v[8:9] clamp
142+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] clamp ; encoding: [0x04,0x80,0x17,0xd5,0x02,0x11,0x02,0x00]
143+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
144+
145+
v_fmac_f64 v[4:5], v[2:3], v[8:9] mul:2
146+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] mul:2 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x08]
147+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
148+
149+
v_fmac_f64 v[4:5], v[2:3], v[8:9] mul:4
150+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] mul:4 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x10]
151+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
152+
153+
v_fmac_f64 v[4:5], v[2:3], v[8:9] div:2
154+
// GFX1250: v_fmac_f64_e64 v[4:5], v[2:3], v[8:9] div:2 ; encoding: [0x04,0x00,0x17,0xd5,0x02,0x11,0x02,0x18]
155+
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU
156+
5157
v_fmamk_f64 v[6:7], v[4:5], 0x405ec000, v[2:3]
6158
// GFX1250: v_fmamk_f64 v[6:7], v[4:5], 0x405ec000, v[2:3] ; encoding: [0x04,0x05,0x0c,0x46,0x00,0x00,0x00,0x00,0x00,0xc0,0x5e,0x40]
7159
// GFX1200-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU

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