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[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
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114 files changed

+141
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‎llvm/include/llvm/CodeGen/PeepholeOptimizer.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class PeepholeOptimizerPass : public PassInfoMixin<PeepholeOptimizerPass> {
1919
MachineFunctionAnalysisManager &MFAM);
2020

2121
MachineFunctionProperties getRequiredProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::IsSSA);
22+
return MachineFunctionProperties().setIsSSA();
2423
}
2524
};
2625

‎llvm/lib/Passes/PassBuilder.cpp

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -448,7 +448,7 @@ class TriggerVerifierErrorPass
448448
// Intentionally create a virtual register and set NoVRegs property.
449449
auto &MRI = MF.getRegInfo();
450450
MRI.createGenericVirtualRegister(LLT::scalar(8));
451-
MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
451+
MF.getProperties().setNoVRegs();
452452
return PreservedAnalyses::all();
453453
}
454454

@@ -466,19 +466,18 @@ class RequireAllMachineFunctionPropertiesPass
466466
}
467467

468468
static MachineFunctionProperties getRequiredProperties() {
469-
MachineFunctionProperties MFProps;
470-
MFProps.set(MachineFunctionProperties::Property::FailedISel);
471-
MFProps.set(MachineFunctionProperties::Property::FailsVerification);
472-
MFProps.set(MachineFunctionProperties::Property::IsSSA);
473-
MFProps.set(MachineFunctionProperties::Property::Legalized);
474-
MFProps.set(MachineFunctionProperties::Property::NoPHIs);
475-
MFProps.set(MachineFunctionProperties::Property::NoVRegs);
476-
MFProps.set(MachineFunctionProperties::Property::RegBankSelected);
477-
MFProps.set(MachineFunctionProperties::Property::Selected);
478-
MFProps.set(MachineFunctionProperties::Property::TiedOpsRewritten);
479-
MFProps.set(MachineFunctionProperties::Property::TracksDebugUserValues);
480-
MFProps.set(MachineFunctionProperties::Property::TracksLiveness);
481-
return MFProps;
469+
return MachineFunctionProperties()
470+
.setFailedISel()
471+
.setFailsVerification()
472+
.setIsSSA()
473+
.setLegalized()
474+
.setNoPHIs()
475+
.setNoVRegs()
476+
.setRegBankSelected()
477+
.setSelected()
478+
.setTiedOpsRewritten()
479+
.setTracksDebugUserValues()
480+
.setTracksLiveness();
482481
}
483482
static StringRef name() { return "RequireAllMachineFunctionPropertiesPass"; }
484483
};

‎llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -86,8 +86,7 @@ class AArch64A53Fix835769 : public MachineFunctionPass {
8686
bool runOnMachineFunction(MachineFunction &F) override;
8787

8888
MachineFunctionProperties getRequiredProperties() const override {
89-
return MachineFunctionProperties().set(
90-
MachineFunctionProperties::Property::NoVRegs);
89+
return MachineFunctionProperties().setNoVRegs();
9190
}
9291

9392
StringRef getPassName() const override {

‎llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,8 +117,7 @@ class AArch64A57FPLoadBalancing : public MachineFunctionPass {
117117
bool runOnMachineFunction(MachineFunction &F) override;
118118

119119
MachineFunctionProperties getRequiredProperties() const override {
120-
return MachineFunctionProperties().set(
121-
MachineFunctionProperties::Property::NoVRegs);
120+
return MachineFunctionProperties().setNoVRegs();
122121
}
123122

124123
StringRef getPassName() const override {

‎llvm/lib/Target/AArch64/AArch64CollectLOH.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -132,8 +132,7 @@ struct AArch64CollectLOH : public MachineFunctionPass {
132132
bool runOnMachineFunction(MachineFunction &MF) override;
133133

134134
MachineFunctionProperties getRequiredProperties() const override {
135-
return MachineFunctionProperties().set(
136-
MachineFunctionProperties::Property::NoVRegs);
135+
return MachineFunctionProperties().setNoVRegs();
137136
}
138137

139138
StringRef getPassName() const override { return AARCH64_COLLECT_LOH_NAME; }

‎llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,8 +52,7 @@ class AArch64CompressJumpTables : public MachineFunctionPass {
5252
bool runOnMachineFunction(MachineFunction &MF) override;
5353

5454
MachineFunctionProperties getRequiredProperties() const override {
55-
return MachineFunctionProperties().set(
56-
MachineFunctionProperties::Property::NoVRegs);
55+
return MachineFunctionProperties().setNoVRegs();
5756
}
5857
StringRef getPassName() const override {
5958
return "AArch64 Compress Jump Tables";

‎llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -188,8 +188,7 @@ class FalkorHWPFFix : public MachineFunctionPass {
188188
}
189189

190190
MachineFunctionProperties getRequiredProperties() const override {
191-
return MachineFunctionProperties().set(
192-
MachineFunctionProperties::Property::NoVRegs);
191+
return MachineFunctionProperties().setNoVRegs();
193192
}
194193

195194
private:

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1121,7 +1121,7 @@ let RecomputePerFunction = 1 in {
11211121
// SelectionDAG's behaviour.
11221122
// FIXME: One day there will probably be a nicer way to check for this, but
11231123
// today is not that day.
1124-
def OptimizedGISelOrOtherSelector : Predicate<"!MF->getFunction().hasOptNone() || MF->getProperties().hasProperty(MachineFunctionProperties::Property::FailedISel) || !MF->getProperties().hasProperty(MachineFunctionProperties::Property::Legalized)">;
1124+
def OptimizedGISelOrOtherSelector : Predicate<"!MF->getFunction().hasOptNone() || MF->getProperties().hasFailedISel() || !MF->getProperties().hasLegalized()">;
11251125
}
11261126

11271127
include "AArch64InstrFormats.td"

‎llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -233,8 +233,7 @@ struct AArch64LoadStoreOpt : public MachineFunctionPass {
233233
bool runOnMachineFunction(MachineFunction &Fn) override;
234234

235235
MachineFunctionProperties getRequiredProperties() const override {
236-
return MachineFunctionProperties().set(
237-
MachineFunctionProperties::Property::NoVRegs);
236+
return MachineFunctionProperties().setNoVRegs();
238237
}
239238

240239
StringRef getPassName() const override { return AARCH64_LOAD_STORE_OPT_NAME; }

‎llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -173,9 +173,7 @@ static MachineFunction &createFrameHelperMachineFunction(Module *M,
173173

174174
MachineFunction &MF = MMI->getOrCreateMachineFunction(*F);
175175
// Remove unnecessary register liveness and set NoVRegs.
176-
MF.getProperties().reset(MachineFunctionProperties::Property::TracksLiveness);
177-
MF.getProperties().reset(MachineFunctionProperties::Property::IsSSA);
178-
MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
176+
MF.getProperties().resetTracksLiveness().resetIsSSA().setNoVRegs();
179177
MF.getRegInfo().freezeReservedRegs();
180178

181179
// Create entry block.

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