llvm ir bitcast added in SPIRVLegalizePointerCast.cpp does not get translated into MIR.

Instead we will do what `SPIRVEmitIntrinsics::visitBitCastInst` does and emit `spv_bitcast` instead of `BitCastInst`.

Author: farzonl

llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp

@@ -76,15 +76,18 @@ class SPIRVLegalizePointerCast : public FunctionPass {
                               FixedVectorType *TargetType, Value *Source) {
     assert(TargetType->getNumElements() <= SourceType->getNumElements());
     LoadInst *NewLoad = B.CreateLoad(SourceType, Source);
-    Value *AssignType = NewLoad;
-    if (TargetType->getElementType() != SourceType->getElementType())
-      AssignType = B.CreateBitCast(NewLoad, TargetType);
-    buildAssignType(B, SourceType, AssignType);
+    buildAssignType(B, SourceType, NewLoad);
+    Value *AssignValue = NewLoad;
+    if (TargetType->getElementType() != SourceType->getElementType()) {
+      AssignValue = B.CreateIntrinsic(Intrinsic::spv_bitcast,
+                                      {TargetType, SourceType}, {NewLoad});
+      buildAssignType(B, TargetType, AssignValue);
+    }
 
     SmallVector<int> Mask(/* Size= */ TargetType->getNumElements());
     for (unsigned I = 0; I < TargetType->getNumElements(); ++I)
       Mask[I] = I;
-    Value *Output = B.CreateShuffleVector(AssignType, AssignType, Mask);
+    Value *Output = B.CreateShuffleVector(AssignValue, AssignValue, Mask);
     buildAssignType(B, TargetType, Output);
     return Output;
   }
@@ -136,7 +139,9 @@ class SPIRVLegalizePointerCast : public FunctionPass {
                                            OriginalOperand, LI);
     }
     // Destination is a smaller vector than source.
+    // or different vector type.
     // - float3 v3 = vector4;
+    // - float4 v2 = int4;
     else if (SVT && DVT)
       Output = loadVectorFromVector(B, SVT, DVT, OriginalOperand);
     // Destination is the scalar type stored at the start of an aggregate.

llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll

@@ -11,7 +11,8 @@ define void @main() local_unnamed_addr #0 {
   ; CHECK: %[[#FLOAT:]] = OpTypeFloat 32
   ; CHECK: %[[#FLOAT4:]] = OpTypeVector %[[#FLOAT]] 4
   ; CHECK: %[[#BUFFER_LOAD:]] = OpLoad %[[#FLOAT4]] %{{[0-9]+}} Aligned 16
-  ; CHECK: %[[#VEC_SHUFFLE:]] = OpVectorShuffle %[[#INT4]] %[[#BUFFER_LOAD]] %[[#BUFFER_LOAD]] 0 1 2 3
+  ; CHECK: %[[#CAST_LOAD:]] = OpBitcast %[[#INT4]] %[[#BUFFER_LOAD]]
+  ; CHECK: %[[#VEC_SHUFFLE:]] = OpVectorShuffle %[[#INT4]] %[[#CAST_LOAD]] %[[#CAST_LOAD]] 0 1 2 3
   %1 = tail call target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4f32_12_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str)
   %2 = tail call target("spirv.VulkanBuffer", [0 x <4 x i32>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v4i32_12_1t(i32 0, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
   %3 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v4f32_12_0t(target("spirv.VulkanBuffer", [0 x <4 x float>], 12, 0) %1, i32 0)