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1 | | -// RUN: %clang_cc1 -triple riscv32-unknown-elf -emit-llvm -DCHECK_IR < %s| FileCheck %s |
2 | | -// RUN: %clang_cc1 -triple riscv64-unknown-elf -emit-llvm -DCHECK_IR < %s| FileCheck %s |
3 | | -// RUN: %clang_cc1 %s -triple riscv32-unknown-elf -verify -fsyntax-only |
4 | | -// RUN: %clang_cc1 %s -triple riscv64-unknown-elf -verify -fsyntax-only |
| 1 | +// RUN: %clang_cc1 -triple riscv32-unknown-elf -target-feature +experimental-xsfmclic -emit-llvm -DCHECK_IR < %s| FileCheck %s |
| 2 | +// RUN: %clang_cc1 -triple riscv64-unknown-elf -target-feature +experimental-xsfmclic -emit-llvm -DCHECK_IR < %s| FileCheck %s |
| 3 | +// RUN: %clang_cc1 %s -triple riscv32-unknown-elf -target-feature +experimental-xsfmclic -verify=enabled,both -fsyntax-only |
| 4 | +// RUN: %clang_cc1 %s -triple riscv64-unknown-elf -target-feature +experimental-xsfmclic -verify=enabled,both -fsyntax-only |
| 5 | +// RUN: %clang_cc1 %s -triple riscv32-unknown-elf -verify=disabled,both -fsyntax-only |
| 6 | +// RUN: %clang_cc1 %s -triple riscv64-unknown-elf -verify=disabled,both -fsyntax-only |
| 7 | +// RUN: %clang_cc1 %s -triple riscv32-unknown-elf -target-feature -experimental-xsfmclic -verify=disabled,both -fsyntax-only |
| 8 | +// RUN: %clang_cc1 %s -triple riscv64-unknown-elf -target-feature -experimental-xsfmclic -verify=disabled,both -fsyntax-only |
5 | 9 |
|
6 | 10 | #if defined(CHECK_IR) |
7 | 11 | // CHECK-LABEL: @foo_stack_swap() #0 |
@@ -61,38 +65,42 @@ void foo_machine_preemptible(void) {} |
61 | 65 | // CHECK: "interrupt"="SiFive-CLIC-preemptible-stack-swap" |
62 | 66 | #else |
63 | 67 |
|
64 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap"))) void foo15(void); |
65 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", "SiFive-CLIC-stack-swap"))) void foo15(void); |
66 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", "machine"))) void foo15(void); |
67 | | -__attribute__((interrupt("machine", "SiFive-CLIC-stack-swap"))) void foo15(void); |
| 68 | +__attribute__((interrupt("SiFive-CLIC-stack-swap"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
| 69 | +__attribute__((interrupt("SiFive-CLIC-stack-swap", "SiFive-CLIC-stack-swap"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
| 70 | +__attribute__((interrupt("SiFive-CLIC-stack-swap", "machine"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
| 71 | +__attribute__((interrupt("machine", "SiFive-CLIC-stack-swap"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
68 | 72 |
|
69 | | -__attribute__((interrupt("SiFive-CLIC-preemptible"))) void foo15(void); |
70 | | -__attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-preemptible"))) void foo15(void); |
71 | | -__attribute__((interrupt("SiFive-CLIC-preemptible", "machine"))) void foo15(void); |
72 | | -__attribute__((interrupt("machine", "SiFive-CLIC-preemptible"))) void foo15(void); |
| 73 | +__attribute__((interrupt("SiFive-CLIC-preemptible"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
| 74 | +__attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-preemptible"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
| 75 | +__attribute__((interrupt("SiFive-CLIC-preemptible", "machine"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
| 76 | +__attribute__((interrupt("machine", "SiFive-CLIC-preemptible"))) void foo15(void); // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
73 | 77 |
|
74 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap"))) void foo16(void) {} |
75 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", "SiFive-CLIC-stack-swap"))) void foo17(void) {} |
76 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", "machine"))) void foo18(void) {} |
77 | | -__attribute__((interrupt("machine", "SiFive-CLIC-stack-swap"))) void foo19(void) {} |
| 78 | +__attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-stack-swap"))) void foo16(void) {} // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
| 79 | +__attribute__((interrupt("SiFive-CLIC-stack-swap", "SiFive-CLIC-preemptible"))) void foo17(void) {} // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
78 | 80 |
|
79 | | -__attribute__((interrupt("SiFive-CLIC-preemptible"))) void foo20(void) {} |
80 | | -__attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-preemptible"))) void foo21(void) {} |
81 | | -__attribute__((interrupt("SiFive-CLIC-preemptible", "machine"))) void foo22(void) {} |
82 | | -__attribute__((interrupt("machine", "SiFive-CLIC-preemptible"))) void foo23(void) {} |
| 81 | +__attribute__((interrupt("machine", "machine", "SiFive-CLIC-preemptible"))) void foo24(void) {} // both-error {{'interrupt' attribute takes no more than 2 arguments}} |
83 | 82 |
|
84 | | -__attribute__((interrupt("machine", "machine", "SiFive-CLIC-preemptible"))) void foo24(void) {} // expected-error {{'interrupt' attribute takes no more than 2 arguments}} |
| 83 | +__attribute__((interrupt("SiFive-CLIC-preemptible", "supervisor"))) void foo27(void) {} // both-error {{RISC-V 'interrupt' attribute contains invalid combination of interrupt types}} |
85 | 84 |
|
86 | | -__attribute__((interrupt("SiFive-CLIC-preemptible", "supervisor"))) void foo27(void) {} // expected-error {{RISC-V 'interrupt' attribute contains invalid combination of interrupt types}} |
| 85 | +__attribute__((interrupt("supervisor", "SiFive-CLIC-stack-swap"))) void foo28(void) {} // both-error {{RISC-V 'interrupt' attribute contains invalid combination of interrupt types}} |
87 | 86 |
|
88 | | -__attribute__((interrupt("supervisor", "SiFive-CLIC-stack-swap"))) void foo28(void) {} // expected-error {{RISC-V 'interrupt' attribute contains invalid combination of interrupt types}} |
| 87 | +__attribute__((interrupt("SiFive-CLIC-stack-swap", 1))) void foo29(void) {} // both-error {{expected string literal as argument of 'interrupt' attribute}} |
89 | 88 |
|
90 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", 1))) void foo29(void) {} // expected-error {{expected string literal as argument of 'interrupt' attribute}} |
| 89 | +__attribute__((interrupt(1, "SiFive-CLIC-stack-swap"))) void foo30(void) {} // both-error {{expected string literal as argument of 'interrupt' attribute}} |
91 | 90 |
|
92 | | -__attribute__((interrupt(1, "SiFive-CLIC-stack-swap"))) void foo30(void) {} // expected-error {{expected string literal as argument of 'interrupt' attribute}} |
| 91 | +__attribute__((interrupt("SiFive-CLIC-stack-swap", "foo"))) void foo31(void) {} // both-warning {{'interrupt' attribute argument not supported: "foo"}} |
93 | 92 |
|
94 | | -__attribute__((interrupt("SiFive-CLIC-stack-swap", "foo"))) void foo31(void) {} // expected-warning {{'interrupt' attribute argument not supported: "foo"}} |
| 93 | +__attribute__((interrupt("foo", "SiFive-CLIC-stack-swap"))) void foo32(void) {} // both-warning {{'interrupt' attribute argument not supported: "foo"}} |
95 | 94 |
|
96 | | -__attribute__((interrupt("foo", "SiFive-CLIC-stack-swap"))) void foo32(void) {} // expected-warning {{'interrupt' attribute argument not supported: "foo"}} |
| 95 | + |
| 96 | +__attribute__((target("arch=+xsfmclic"))) __attribute__((interrupt("SiFive-CLIC-preemptible"))) void foo_sfmclic_preemptible(void) {} |
| 97 | +__attribute__((target("arch=+xsfmclic"))) __attribute__((interrupt("SiFive-CLIC-stack-swap"))) void foo_sfmclic_stack_swap(void) {} |
| 98 | +__attribute__((target("arch=+xsfmclic"))) __attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-stack-swap"))) void foo_sfmclic_both(void) {} |
| 99 | + |
| 100 | +// The attribute order is important, the interrupt attribute must come after the |
| 101 | +// target attribute |
| 102 | +__attribute__((interrupt("SiFive-CLIC-preemptible"))) __attribute__((target("arch=+xsfmclic"))) void foo_preemptible_sfmclic(void) {} // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
| 103 | +__attribute__((interrupt("SiFive-CLIC-stack-swap"))) __attribute__((target("arch=+xsfmclic"))) void fooc_stack_swap_sfmclic(void) {} // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-stack-swap' requires extension 'XSfmclic'}} |
| 104 | +__attribute__((interrupt("SiFive-CLIC-preemptible", "SiFive-CLIC-stack-swap"))) __attribute__((target("arch=+xsfmclic"))) void foo_both_sfmclic(void) {} // disabled-error {{RISC-V 'interrupt' attribute 'SiFive-CLIC-preemptible' requires extension 'XSfmclic'}} |
97 | 105 |
|
98 | 106 | #endif |
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