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--Added test files for the extension SPV_INTEL_blocking_pipes
--Added support for the extension SPV_INTEL_blocking_pipes
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8 files changed

+155
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8 files changed

+155
-2
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llvm/docs/SPIRVUsage.rst

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Original file line numberDiff line numberDiff line change
@@ -213,6 +213,8 @@ list of supported SPIR-V extensions, sorted alphabetically by their extension na
213213
- Adds a bitwise instruction on three operands and a look-up table index for specifying the bitwise operation to perform.
214214
* - ``SPV_INTEL_subgroup_matrix_multiply_accumulate``
215215
- Adds an instruction to compute the matrix product of an M x K matrix with a K x N matrix and then add an M x N matrix.
216+
* - ``SPV_INTEL_blocking_pipes``
217+
- Adds new pipe read and write functions that have blocking semantics instead of the non-blocking semantics of the existing pipe read/write functions.
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217219
To enable multiple extensions, list them separated by comma. For example, to enable support for atomic operations on floating-point numbers and arbitrary precision integers, use:
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llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -697,7 +697,8 @@ static bool buildAtomicStoreInst(const SPIRV::IncomingCall *Call,
697697
MachineIRBuilder &MIRBuilder,
698698
SPIRVGlobalRegistry *GR) {
699699
if (Call->isSpirvOp())
700-
return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicStore, Call, Register(0));
700+
return buildOpFromWrapper(MIRBuilder, SPIRV::OpAtomicStore, Call,
701+
Register(0));
701702

702703
Register ScopeRegister =
703704
buildConstantIntReg32(SPIRV::Scope::Device, MIRBuilder, GR);
@@ -2296,6 +2297,19 @@ static bool generateExtendedBitOpsInst(const SPIRV::IncomingCall *Call,
22962297
return buildExtendedBitOpsInst(Call, Opcode, MIRBuilder, GR);
22972298
}
22982299

2300+
static bool generateBlockingPipesInst(const SPIRV::IncomingCall *Call,
2301+
MachineIRBuilder &MIRBuilder,
2302+
SPIRVGlobalRegistry *GR) {
2303+
const SPIRV::DemangledBuiltin *Builtin = Call->Builtin;
2304+
unsigned Opcode =
2305+
SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
2306+
2307+
auto MIB = MIRBuilder.buildInstr(Opcode);
2308+
for (unsigned i = 0; i < Call->Arguments.size(); ++i)
2309+
MIB.addUse(Call->Arguments[i]);
2310+
return true;
2311+
}
2312+
22992313
static bool generateBindlessImageINTELInst(const SPIRV::IncomingCall *Call,
23002314
MachineIRBuilder &MIRBuilder,
23012315
SPIRVGlobalRegistry *GR) {
@@ -2900,6 +2914,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
29002914
return generateExtendedBitOpsInst(Call.get(), MIRBuilder, GR);
29012915
case SPIRV::BindlessINTEL:
29022916
return generateBindlessImageINTELInst(Call.get(), MIRBuilder, GR);
2917+
case SPIRV::BlockingPipes:
2918+
return generateBlockingPipesInst(Call.get(), MIRBuilder, GR);
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case SPIRV::TernaryBitwiseINTEL:
29042920
return generateTernaryBitwiseFunctionINTELInst(Call.get(), MIRBuilder, GR);
29052921
}

llvm/lib/Target/SPIRV/SPIRVBuiltins.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@ def ICarryBorrow : BuiltinGroup;
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def ExtendedBitOps : BuiltinGroup;
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def BindlessINTEL : BuiltinGroup;
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def TernaryBitwiseINTEL : BuiltinGroup;
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def BlockingPipes : BuiltinGroup;
7172

7273
//===----------------------------------------------------------------------===//
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// Class defining a demangled builtin record. The information in the record
@@ -1136,6 +1137,10 @@ defm : DemangledNativeBuiltin<"clock_read_hilo_device", OpenCL_std, KernelClock,
11361137
defm : DemangledNativeBuiltin<"clock_read_hilo_work_group", OpenCL_std, KernelClock, 0, 0, OpReadClockKHR>;
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defm : DemangledNativeBuiltin<"clock_read_hilo_sub_group", OpenCL_std, KernelClock, 0, 0, OpReadClockKHR>;
11381139

1140+
//SPV_INTEL_blocking_pipes
1141+
defm : DemangledNativeBuiltin<"__spirv_WritePipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpWritePipeBlockingINTEL>;
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defm : DemangledNativeBuiltin<"__spirv_ReadPipeBlockingINTEL", OpenCL_std, BlockingPipes, 0, 0, OpReadPipeBlockingINTEL>;
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11391144
//===----------------------------------------------------------------------===//
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// Class defining an atomic instruction on floating-point numbers.
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//

llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp

Lines changed: 3 additions & 1 deletion
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@@ -97,7 +97,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
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SPIRV::Extension::Extension::
9898
SPV_INTEL_subgroup_matrix_multiply_accumulate},
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{"SPV_INTEL_ternary_bitwise_function",
100-
SPIRV::Extension::Extension::SPV_INTEL_ternary_bitwise_function}};
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SPIRV::Extension::Extension::SPV_INTEL_ternary_bitwise_function},
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{"SPV_INTEL_blocking_pipes",
102+
SPIRV::Extension::Extension::SPV_INTEL_blocking_pipes}};
101103

102104
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
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StringRef ArgValue,

llvm/lib/Target/SPIRV/SPIRVInstrInfo.td

Lines changed: 6 additions & 0 deletions
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@@ -936,3 +936,9 @@ def OpAliasScopeListDeclINTEL: Op<5913, (outs ID:$res), (ins variable_ops),
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// SPV_INTEL_ternary_bitwise_function
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def OpBitwiseFunctionINTEL: Op<6242, (outs ID:$res), (ins TYPE:$type, ID:$a, ID:$b, ID:$c, ID:$lut_index),
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"$res = OpBitwiseFunctionINTEL $type $a $b $c $lut_index">;
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940+
//SPV_INTEL_blocking_pipes
941+
def OpReadPipeBlockingINTEL :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
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"OpReadPipeBlockingINTEL $pipe $pointer $packetSize $packetAlignment">;
943+
def OpWritePipeBlockingINTEL :Op<5946, (outs), (ins ID:$pipe, ID:$pointer, ID:$packetSize, ID:$packetAlignment),
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"OpWritePipeBlockingINTEL $pipe $pointer $packetSize $packetAlignment">;

llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

Lines changed: 7 additions & 0 deletions
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@@ -1719,6 +1719,13 @@ void addInstrRequirements(const MachineInstr &MI,
17191719
Reqs.addCapability(
17201720
SPIRV::Capability::CooperativeMatrixCheckedInstructionsINTEL);
17211721
break;
1722+
case SPIRV::OpReadPipeBlockingINTEL:
1723+
case SPIRV::OpWritePipeBlockingINTEL:
1724+
if (ST.canUseExtension(SPIRV::Extension::SPV_INTEL_blocking_pipes)) {
1725+
Reqs.addExtension(SPIRV::Extension::SPV_INTEL_blocking_pipes);
1726+
Reqs.addCapability(SPIRV::Capability::BlockingPipesINTEL);
1727+
}
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break;
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case SPIRV::OpCooperativeMatrixGetElementCoordINTEL:
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if (!ST.canUseExtension(SPIRV::Extension::SPV_INTEL_joint_matrix))
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report_fatal_error("OpCooperativeMatrixGetElementCoordINTEL requires the "

llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

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@@ -515,6 +515,7 @@ defm LongCompositesINTEL : CapabilityOperand<6089, 0, 0, [SPV_INTEL_long_composi
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defm BindlessImagesINTEL : CapabilityOperand<6528, 0, 0, [SPV_INTEL_bindless_images], []>;
516516
defm MemoryAccessAliasingINTEL : CapabilityOperand<5910, 0, 0, [SPV_INTEL_memory_access_aliasing], []>;
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defm FPMaxErrorINTEL : CapabilityOperand<6169, 0, 0, [SPV_INTEL_fp_max_error], []>;
518+
defm BlockingPipesINTEL : CapabilityOperand<5945, 0, 0, [SPV_INTEL_blocking_pipes], []>;
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defm TernaryBitwiseFunctionINTEL : CapabilityOperand<6241, 0, 0, [SPV_INTEL_ternary_bitwise_function], []>;
519520
defm SubgroupMatrixMultiplyAccumulateINTEL : CapabilityOperand<6236, 0, 0, [SPV_INTEL_subgroup_matrix_multiply_accumulate], []>;
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@@ -0,0 +1,114 @@
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_blocking_pipes %s -o - | FileCheck %s --check-prefixes=CHECK-SPIRV
2+
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_blocking_pipes %s -o - -filetype=obj | spirv-val %}
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4+
%opencl.pipe_ro_t = type opaque
5+
%opencl.pipe_wo_t = type opaque
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7+
; CHECK-SPIRV: OpCapability BlockingPipesINTEL
8+
; CHECK-SPIRV: OpExtension "SPV_INTEL_blocking_pipes"
9+
; CHECK-SPIRV: %[[PipeRTy:[0-9]+]] = OpTypePipe ReadOnly
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; CHECK-SPIRV: %[[PipeWTy:[0-9]+]] = OpTypePipe WriteOnly
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; CHECK-SPIRV: %[[PipeR1:[0-9]+]] = OpLoad %[[PipeRTy]] %[[#]] Aligned 8
12+
; CHECK-SPIRV: OpReadPipeBlockingINTEL %[[PipeR1]] %[[#]] %[[#]] %[[#]]
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; CHECK-SPIRV: %[[PipeR2:[0-9]+]] = OpLoad %[[PipeRTy]] %[[#]] Aligned 8
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; CHECK-SPIRV: OpReadPipeBlockingINTEL %[[PipeR2]] %[[#]] %[[#]] %[[#]]
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; CHECK-SPIRV: %[[PipeW1:[0-9]+]] = OpLoad %[[PipeWTy]] %[[#]] Aligned 8
16+
; CHECK-SPIRV: OpWritePipeBlockingINTEL %[[PipeW1]] %[[#]] %[[#]] %[[#]]
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; CHECK-SPIRV: %[[PipeW2:[0-9]+]] = OpLoad %[[PipeWTy]] %[[#]] Aligned 8
18+
; CHECK-SPIRV: OpWritePipeBlockingINTEL %[[PipeW2]] %[[#]] %[[#]] %[[#]]
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20+
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; Function Attrs: convergent noinline nounwind optnone
22+
define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
23+
entry:
24+
%p.addr = alloca target("spirv.Pipe", 0), align 8
25+
%ptr.addr = alloca ptr addrspace(1), align 8
26+
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
27+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
28+
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
29+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
30+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
31+
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
32+
ret void
33+
}
34+
35+
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
36+
37+
; Function Attrs: convergent noinline nounwind optnone
38+
define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
39+
entry:
40+
%p.addr = alloca target("spirv.Pipe", 0), align 8
41+
%ptr.addr = alloca ptr addrspace(1), align 8
42+
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
43+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
44+
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
45+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
46+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
47+
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
48+
ret void
49+
}
50+
51+
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
52+
53+
; Function Attrs: convergent noinline nounwind optnone
54+
define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
55+
entry:
56+
%p.addr = alloca target("spirv.Pipe", 1), align 8
57+
%ptr.addr = alloca ptr addrspace(1), align 8
58+
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
59+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
60+
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
61+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
62+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
63+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
64+
ret void
65+
}
66+
67+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
68+
69+
; Function Attrs: convergent noinline nounwind optnone
70+
define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
71+
entry:
72+
%p.addr = alloca target("spirv.Pipe", 1), align 8
73+
%ptr.addr = alloca ptr addrspace(1), align 8
74+
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
75+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
76+
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
77+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
78+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
79+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
80+
ret void
81+
}
82+
83+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
84+
85+
; CHECK-LLVM: declare spir_func void @__read_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
86+
; CHECK-LLVM: declare spir_func void @__write_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
87+
88+
; Function Attrs: convergent mustprogress norecurse nounwind
89+
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(ptr addrspace(4) align 2 dereferenceable(2) %_Data) {
90+
entry:
91+
%_Data.addr = alloca ptr addrspace(4), align 8
92+
%_WPipe = alloca target("spirv.Pipe", 1), align 8
93+
%_Data.addr.ascast = addrspacecast ptr %_Data.addr to ptr addrspace(4)
94+
%_WPipe.ascast = addrspacecast target("spirv.Pipe", 1)* %_WPipe to target("spirv.Pipe", 1) addrspace(4)*
95+
store ptr addrspace(4) %_Data, ptr addrspace(4) %_Data.addr.ascast, align 8
96+
%0 = bitcast target("spirv.Pipe", 1)* %_WPipe to ptr
97+
%1 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1) addrspace(4)* %_WPipe.ascast, align 8
98+
%2 = load ptr addrspace(4), ptr addrspace(4) %_Data.addr.ascast, align 8
99+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, ptr addrspace(4) %2, i32 2, i32 2)
100+
ret void
101+
}
102+
103+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
104+
105+
attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
106+
107+
!llvm.module.flags = !{!0}
108+
!opencl.ocl.version = !{!1}
109+
!opencl.spir.version = !{!1}
110+
!llvm.ident = !{!2}
111+
112+
!0 = !{i32 1, !"wchar_size", i32 4}
113+
!1 = !{i32 2, i32 0}
114+
!2 = !{!"clang version 9.0.0 (https://github.com/MrSidims/llvm.git c627b787284c5bcc917ea9742908baa1b856e176)"}

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