Address review feedback

Author: nikic

llvm/docs/SourceLevelDebugging.rst

@@ -208,10 +208,10 @@ comma-separated arguments in parentheses, as with a `call`.
     #dbg_declare([Value|MDNode], DILocalVariable, DIExpression, DILocation)
 
 This record provides information about a local element (e.g., variable).
-The first argument is an SSA value corresponding to a variable address, and is
-typically a static alloca in the function entry block.  The second argument is a
-`local variable <LangRef.html#dilocalvariable>`_ containing a description of
-the variable.  The third argument is a `complex expression
+The first argument is an SSA ``ptr`` value corresponding to a variable address,
+and is typically a static alloca in the function entry block.  The second
+argument is a `local variable <LangRef.html#dilocalvariable>`_ containing a
+description of the variable.  The third argument is a `complex expression
 <LangRef.html#diexpression>`_. The fourth argument is a `source location
 <LangRef.html#dilocation>`_. A ``#dbg_declare`` record describes the
 *address* of a source variable.

llvm/lib/IR/Verifier.cpp

@@ -6671,8 +6671,9 @@ void Verifier::visit(DbgVariableRecord &DVR) {
     if (DVR.isDbgDeclare())
       CheckDI(VAM->getValue()->getType()->isPointerTy(),
               "location of #dbg_declare must be a pointer", &DVR, MD);
-  } else if (auto *AL = dyn_cast<DIArgList>(MD))
+  } else if (auto *AL = dyn_cast<DIArgList>(MD)) {
     visitDIArgList(*AL, F);
+  }
 
   CheckDI(isa_and_nonnull<DILocalVariable>(DVR.getRawVariable()),
           "invalid #dbg record variable", &DVR, DVR.getRawVariable());

llvm/test/CodeGen/AArch64/selectiondag-order.ll

@@ -53,9 +53,8 @@ end:                                        ; preds = %body
 ; AARCH64-CHECK: BB1_1:
 
 
-define i64 @simulateWithDbgDeclare(<2 x i32> %a) local_unnamed_addr  {
+define i64 @simulateWithDbgDeclare(<2 x i32> %a, ptr %ptr) local_unnamed_addr  {
 entry:
-  %ptr = alloca i32
   %rand = tail call i64 @lrand48() #3
   tail call void @llvm.dbg.declare(metadata ptr %ptr, metadata !6, metadata !7), !dbg !8
   br label %body

llvm/test/CodeGen/X86/selectiondag-order.ll

@@ -53,9 +53,8 @@ end:                                        ; preds = %body
 ; X86-CHECK: callq  lrand48
 ; X86-CHECK: movq  %rax, %rbx
 
-define i64 @simulateWithDbgDeclare(<2 x i32> %a) local_unnamed_addr  {
+define i64 @simulateWithDbgDeclare(<2 x i32> %a, ptr %ptr) local_unnamed_addr  {
 entry:
-  %ptr = alloca i32
   %rand = tail call i64 @lrand48() #3
   tail call void @llvm.dbg.declare(metadata ptr %ptr, metadata !6, metadata !7), !dbg !8
   br label %body