Use Promote for i32 lzcnt

Created using spr 1.3.5

Author: koachan

llvm/lib/Target/Sparc/SparcISelLowering.cpp

@@ -1817,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
   setOperationAction(ISD::FREM , MVT::f32, Expand);
   setOperationAction(ISD::FMA  , MVT::f32, Expand);
   setOperationAction(ISD::CTTZ , MVT::i32, Expand);
-  setOperationAction(ISD::CTLZ, MVT::i32, Subtarget->isVIS3() ? Legal : Expand);
+  setOperationAction(ISD::CTLZ, MVT::i32,
+                     Subtarget->isVIS3() ? Promote : Expand);
   setOperationAction(ISD::ROTL , MVT::i32, Expand);
   setOperationAction(ISD::ROTR , MVT::i32, Expand);
   setOperationAction(ISD::BSWAP, MVT::i32, Expand);
@@ -1990,6 +1991,11 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
   if (Subtarget->hasLeonCycleCounter())
     setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom);
 
+  if (Subtarget->isVIS3()) {
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote);
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
+  }
+
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
 
   setMinFunctionAlignment(Align(4));

llvm/lib/Target/Sparc/SparcInstrVIS.td

@@ -299,14 +299,12 @@ def : Pat<(i64 (mulhu i64:$lhs, i64:$rhs)), (UMULXHI $lhs, $rhs)>;
 // Signed "MULXHI".
 // Based on the formula presented in OSA2011 §7.140, but with bitops to select
 // the values to be added.
+// TODO: This expansion should probably be moved to DAG legalization phase.
 def : Pat<(i64 (mulhs i64:$lhs, i64:$rhs)),
       (SUBrr (UMULXHI $lhs, $rhs),
              (ADDrr (ANDrr (SRAXri $lhs, 63), $rhs),
                     (ANDrr (SRAXri $rhs, 63), $lhs)))>;
 
 def : Pat<(i64 (ctlz i64:$src)), (LZCNT $src)>;
-// 32-bit LZCNT.
-// The zero extension will leave us with 32 extra leading zeros,
-// so we need to compensate for it.
-def : Pat<(i32 (ctlz i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>;
+def : Pat<(i64 (ctlz_zero_undef i64:$src)), (LZCNT $src)>;
 } // Predicates = [HasVIS3]

llvm/test/CodeGen/SPARC/ctlz.ll

@@ -77,10 +77,9 @@ define i32 @i32_nopoison(i32 %x) nounwind {
 ; VIS3-NEXT:    be %icc, .LBB0_2
 ; VIS3-NEXT:    nop
 ; VIS3-NEXT:  ! %bb.1: ! %cond.false
-; VIS3-NEXT:    srl %o0, 0, %o0
-; VIS3-NEXT:    lzcnt %o0, %o0
+; VIS3-NEXT:    sllx %o0, 32, %o0
 ; VIS3-NEXT:    retl
-; VIS3-NEXT:    add %o0, -32, %o0
+; VIS3-NEXT:    lzcnt %o0, %o0
 ; VIS3-NEXT:  .LBB0_2:
 ; VIS3-NEXT:    retl
 ; VIS3-NEXT:    mov 32, %o0
@@ -144,10 +143,9 @@ define i32 @i32_poison(i32 %x) nounwind {
 ;
 ; VIS3-LABEL: i32_poison:
 ; VIS3:       ! %bb.0:
-; VIS3-NEXT:    srl %o0, 0, %o0
-; VIS3-NEXT:    lzcnt %o0, %o0
+; VIS3-NEXT:    sllx %o0, 32, %o0
 ; VIS3-NEXT:    retl
-; VIS3-NEXT:    add %o0, -32, %o0
+; VIS3-NEXT:    lzcnt %o0, %o0
   %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
   ret i32 %ret
 }