Updated the changes by adopting the suggestions.

Author: ukalappa-mips

clang/include/clang/Basic/BuiltinsRISCVXMIPS.td

@@ -11,17 +11,11 @@
 //
 //===----------------------------------------------------------------------===//
 
-class RISCVXMIPSBuiltin<string prototype, string features = ""> : TargetBuiltin {
-  let Spellings = ["__builtin_riscv_" # NAME];
-  let Prototype = prototype;
-  let Features = features;
-}
-
 //===----------------------------------------------------------------------===//
-// MIPS execution control extensions  .
+// MIPS execution control extensions.
 //===----------------------------------------------------------------------===//
 let Attributes = [NoThrow, Const] in {
-def mips_pause : RISCVXMIPSBuiltin<"void()", "xmipsexectl">;
-def mips_ehb   : RISCVXMIPSBuiltin<"void()", "xmipsexectl">;
-def mips_ihb   : RISCVXMIPSBuiltin<"void()", "xmipsexectl">;
-}
+def mips_pause : RISCVBuiltin<"void()", "xmipsexectl">;
+def mips_ehb   : RISCVBuiltin<"void()", "xmipsexectl">;
+def mips_ihb   : RISCVBuiltin<"void()", "xmipsexectl">;
+}

llvm/include/llvm/IR/IntrinsicsRISCVXMIPS.td

@@ -1,12 +1,12 @@
-//===- IntrinsicsRISCVXMIPS.td - Defines MIPS intrinsics -------*- tablegen -*-===//
+//===- IntrinsicsRISCVXMIPS.td - MIPS intrinsics -------*- tablegen -*----===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
-// This file defines all of the MIPS specific intrinsics for RISCV.
+// This file defines all of the MIPS specific intrinsics for RISC-V.
 //
 //===----------------------------------------------------------------------===//
 

llvm/test/CodeGen/RISCV/xmips-exectl.ll

@@ -1,10 +1,10 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --tool /home/ukalappa/llvm/github/build/bin/llc --version 6
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; RUN: llc -mtriple=riscv64 -mcpu=mips-p8700 -O3  -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=MIPS %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
 
-define dso_local void @test_mips_pause() local_unnamed_addr  {
+define void @test_mips_pause() {
 ; MIPS-LABEL: test_mips_pause:
 ; MIPS:       # %bb.0: # %entry
 ; MIPS-NEXT:    mips.pause
@@ -14,7 +14,7 @@ entry:
   ret void
 }
 
-define dso_local void @test_mips_ehb() local_unnamed_addr  {
+define void @test_mips_ehb() {
 ; MIPS-LABEL: test_mips_ehb:
 ; MIPS:       # %bb.0: # %entry
 ; MIPS-NEXT:    mips.ehb
@@ -24,7 +24,7 @@ entry:
   ret void
 }
 
-define dso_local void @test_mips_ihb() local_unnamed_addr  {
+define void @test_mips_ihb() {
 ; MIPS-LABEL: test_mips_ihb:
 ; MIPS:       # %bb.0: # %entry
 ; MIPS-NEXT:    mips.ihb