[AVR] Use MCRegister in AsmParser. NFC

Author: topperc

llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp

@@ -68,9 +68,9 @@ class AVRAsmParser : public MCTargetAsmParser {
   ParseStatus parseMemriOperand(OperandVector &Operands);
 
   bool parseOperand(OperandVector &Operands, bool maybeReg);
-  int parseRegisterName(MCRegister (*matchFn)(StringRef));
-  int parseRegisterName();
-  int parseRegister(bool RestoreOnFailure = false);
+  MCRegister parseRegisterName(MCRegister (*matchFn)(StringRef));
+  MCRegister parseRegisterName();
+  MCRegister parseRegister(bool RestoreOnFailure = false);
   bool tryParseRegisterOperand(OperandVector &Operands);
   bool tryParseExpression(OperandVector &Operands, int64_t offset);
   bool tryParseRelocExpression(OperandVector &Operands);
@@ -79,7 +79,7 @@ class AVRAsmParser : public MCTargetAsmParser {
   unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
                                       unsigned Kind) override;
 
-  unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) {
+  MCRegister toDREG(MCRegister Reg, unsigned From = AVR::sub_lo) {
     MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID];
     return MRI->getMatchingSuperReg(Reg, From, Class);
   }
@@ -113,15 +113,15 @@ class AVROperand : public MCParsedAsmOperand {
 public:
   AVROperand(StringRef Tok, SMLoc const &S)
       : Kind(k_Token), Tok(Tok), Start(S), End(S) {}
-  AVROperand(unsigned Reg, SMLoc const &S, SMLoc const &E)
+  AVROperand(MCRegister Reg, SMLoc const &S, SMLoc const &E)
       : Kind(k_Register), RegImm({Reg, nullptr}), Start(S), End(E) {}
   AVROperand(MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
       : Kind(k_Immediate), RegImm({0, Imm}), Start(S), End(E) {}
-  AVROperand(unsigned Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
+  AVROperand(MCRegister Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
       : Kind(k_Memri), RegImm({Reg, Imm}), Start(S), End(E) {}
 
   struct RegisterImmediate {
-    unsigned Reg;
+    MCRegister Reg;
     MCExpr const *Imm;
   };
   union {
@@ -210,9 +210,9 @@ class AVROperand : public MCParsedAsmOperand {
     return std::make_unique<AVROperand>(Str, S);
   }
 
-  static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S,
+  static std::unique_ptr<AVROperand> CreateReg(MCRegister Reg, SMLoc S,
                                                SMLoc E) {
-    return std::make_unique<AVROperand>(RegNum, S, E);
+    return std::make_unique<AVROperand>(Reg, S, E);
   }
 
   static std::unique_ptr<AVROperand> CreateImm(const MCExpr *Val, SMLoc S,
@@ -221,28 +221,28 @@ class AVROperand : public MCParsedAsmOperand {
   }
 
   static std::unique_ptr<AVROperand>
-  CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) {
-    return std::make_unique<AVROperand>(RegNum, Val, S, E);
+  CreateMemri(MCRegister Reg, const MCExpr *Val, SMLoc S, SMLoc E) {
+    return std::make_unique<AVROperand>(Reg, Val, S, E);
   }
 
   void makeToken(StringRef Token) {
     Kind = k_Token;
     Tok = Token;
   }
 
-  void makeReg(unsigned RegNo) {
+  void makeReg(MCRegister Reg) {
     Kind = k_Register;
-    RegImm = {RegNo, nullptr};
+    RegImm = {Reg, nullptr};
   }
 
   void makeImm(MCExpr const *Ex) {
     Kind = k_Immediate;
     RegImm = {0, Ex};
   }
 
-  void makeMemri(unsigned RegNo, MCExpr const *Imm) {
+  void makeMemri(MCRegister Reg, MCExpr const *Imm) {
     Kind = k_Memri;
-    RegImm = {RegNo, Imm};
+    RegImm = {Reg, Imm};
   }
 
   SMLoc getStartLoc() const override { return Start; }
@@ -346,36 +346,36 @@ bool AVRAsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
 
 /// Parses a register name using a given matching function.
 /// Checks for lowercase or uppercase if necessary.
-int AVRAsmParser::parseRegisterName(MCRegister (*matchFn)(StringRef)) {
+MCRegister AVRAsmParser::parseRegisterName(MCRegister (*matchFn)(StringRef)) {
   StringRef Name = Parser.getTok().getString();
 
-  int RegNum = matchFn(Name);
+  MCRegister Reg = matchFn(Name);
 
   // GCC supports case insensitive register names. Some of the AVR registers
   // are all lower case, some are all upper case but non are mixed. We prefer
   // to use the original names in the register definitions. That is why we
   // have to test both upper and lower case here.
-  if (RegNum == AVR::NoRegister) {
-    RegNum = matchFn(Name.lower());
+  if (!Reg) {
+    Reg = matchFn(Name.lower());
   }
-  if (RegNum == AVR::NoRegister) {
-    RegNum = matchFn(Name.upper());
+  if (!Reg) {
+    Reg = matchFn(Name.upper());
   }
 
-  return RegNum;
+  return Reg;
 }
 
-int AVRAsmParser::parseRegisterName() {
-  int RegNum = parseRegisterName(&MatchRegisterName);
+MCRegister AVRAsmParser::parseRegisterName() {
+  MCRegister Reg = parseRegisterName(&MatchRegisterName);
 
-  if (RegNum == AVR::NoRegister)
-    RegNum = parseRegisterName(&MatchRegisterAltName);
+  if (!Reg)
+    Reg = parseRegisterName(&MatchRegisterAltName);
 
-  return RegNum;
+  return Reg;
 }
 
-int AVRAsmParser::parseRegister(bool RestoreOnFailure) {
-  int RegNum = AVR::NoRegister;
+MCRegister AVRAsmParser::parseRegister(bool RestoreOnFailure) {
+  MCRegister Reg;
 
   if (Parser.getTok().is(AsmToken::Identifier)) {
     // Check for register pair syntax
@@ -387,32 +387,32 @@ int AVRAsmParser::parseRegister(bool RestoreOnFailure) {
 
       if (Parser.getTok().is(AsmToken::Identifier)) {
         // Convert lower (even) register to DREG
-        RegNum = toDREG(parseRegisterName());
+        Reg = toDREG(parseRegisterName());
       }
-      if (RegNum == AVR::NoRegister && RestoreOnFailure) {
+      if (!Reg && RestoreOnFailure) {
         getLexer().UnLex(std::move(ColonTok));
         getLexer().UnLex(std::move(HighTok));
       }
     } else {
-      RegNum = parseRegisterName();
+      Reg = parseRegisterName();
     }
   }
-  return RegNum;
+  return Reg;
 }
 
 bool AVRAsmParser::tryParseRegisterOperand(OperandVector &Operands) {
-  int RegNo = parseRegister();
+  MCRegister Reg = parseRegister();
 
-  if (RegNo == AVR::NoRegister)
+  if (!Reg)
     return true;
 
   // Reject R0~R15 on avrtiny.
-  if (AVR::R0 <= RegNo && RegNo <= AVR::R15 &&
+  if (AVR::R0 <= Reg && Reg <= AVR::R15 &&
       STI.hasFeature(AVR::FeatureTinyEncoding))
     return Error(Parser.getTok().getLoc(), "invalid register on avrtiny");
 
   AsmToken const &T = Parser.getTok();
-  Operands.push_back(AVROperand::CreateReg(RegNo, T.getLoc(), T.getEndLoc()));
+  Operands.push_back(AVROperand::CreateReg(Reg, T.getLoc(), T.getEndLoc()));
   Parser.Lex(); // Eat register token.
 
   return false;
@@ -569,13 +569,13 @@ ParseStatus AVRAsmParser::parseMemriOperand(OperandVector &Operands) {
 
   SMLoc E, S;
   MCExpr const *Expression;
-  int RegNo;
+  MCRegister Reg;
 
   // Parse register.
   {
-    RegNo = parseRegister();
+    Reg = parseRegister();
 
-    if (RegNo == AVR::NoRegister)
+    if (!Reg)
       return ParseStatus::Failure;
 
     S = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
@@ -590,7 +590,7 @@ ParseStatus AVRAsmParser::parseMemriOperand(OperandVector &Operands) {
     E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
   }
 
-  Operands.push_back(AVROperand::CreateMemri(RegNo, Expression, S, E));
+  Operands.push_back(AVROperand::CreateMemri(Reg, Expression, S, E));
 
   return ParseStatus::Success;
 }
@@ -761,9 +761,8 @@ unsigned AVRAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
 
       std::ostringstream RegName;
       RegName << "r" << RegNum;
-      RegNum = MatchRegisterName(RegName.str());
-      if (RegNum != AVR::NoRegister) {
-        Op.makeReg(RegNum);
+      if (MCRegister Reg = MatchRegisterName(RegName.str())) {
+        Op.makeReg(Reg);
         if (validateOperandClass(Op, Expected) == Match_Success) {
           return Match_Success;
         }
@@ -776,9 +775,9 @@ unsigned AVRAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
     // If the instruction uses a register pair but we got a single, lower
     // register we perform a "class cast".
     if (isSubclass(Expected, MCK_DREGS)) {
-      unsigned correspondingDREG = toDREG(Op.getReg());
+      MCRegister correspondingDREG = toDREG(Op.getReg());
 
-      if (correspondingDREG != AVR::NoRegister) {
+      if (correspondingDREG) {
         Op.makeReg(correspondingDREG);
         return validateOperandClass(Op, Expected);
       }