@@ -658,26 +658,23 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
658658 if (MI.getNumDefs () != 1 )
659659 return false ;
660660
661+ // If we're not using VLMAX, then we need to be careful whether we are using
662+ // TA/TU when there is a non-undef Passthru. But when we are using VLMAX, it
663+ // does not matter whether we are using TA/TU with a non-undef Passthru, since
664+ // there are no tail elements to be perserved.
661665 unsigned VLOpNum = RISCVII::getVLOpNum (Desc);
662666 const MachineOperand &VLOp = MI.getOperand (VLOpNum);
663- if (((VLOp.isImm () && VLOp.getImm () != RISCV::VLMaxSentinel) ||
664- VLOp.isReg ())) {
665- bool UseTAPolicy = false ;
667+ if (VLOp.isReg () || VLOp.getImm () != RISCV::VLMaxSentinel) {
668+ // If MI has a non-undef passthru, we will not try to optimize it since
669+ // that requires us to preserve tail elements according to TA/TU.
670+ // Otherwise, The MI has an undef Passthru, so it doesn't matter whether we
671+ // are using TA/TU.
666672 bool HasPassthru = RISCVII::isFirstDefTiedToFirstUse (Desc);
667- if (RISCVII::hasVecPolicyOp (Desc.TSFlags )) {
668- unsigned PolicyOpNum = RISCVII::getVecPolicyOpNum (Desc);
669- const MachineOperand &PolicyOp = MI.getOperand (PolicyOpNum);
670- uint64_t Policy = PolicyOp.getImm ();
671- UseTAPolicy = Policy & RISCVII::TAIL_AGNOSTIC;
672- if (HasPassthru) {
673- unsigned PassthruOpIdx = MI.getNumExplicitDefs ();
674- UseTAPolicy = UseTAPolicy || (MI.getOperand (PassthruOpIdx).getReg () ==
675- RISCV::NoRegister);
676- }
677- }
678- if (!UseTAPolicy) {
673+ unsigned PassthruOpIdx = MI.getNumExplicitDefs ();
674+ if (HasPassthru &&
675+ MI.getOperand (PassthruOpIdx).getReg () != RISCV::NoRegister) {
679676 LLVM_DEBUG (
680- dbgs () << " Not a candidate because it uses tail-undisturbed policy "
677+ dbgs () << " Not a candidate because it uses non-undef passthru "
681678 " with non-VLMAX VL\n " );
682679 return false ;
683680 }
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