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[𝘀𝗽𝗿] initial version
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llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 48 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -5815,26 +5815,30 @@ static InstructionCost getExtractWithExtendCost(
58155815
static Value *createInsertVector(
58165816
IRBuilderBase &Builder, Value *Vec, Value *V, unsigned Index,
58175817
function_ref<Value *(Value *, Value *, ArrayRef<int>)> Generator = {}) {
5818+
if (isa<PoisonValue>(Vec) && isa<PoisonValue>(V))
5819+
return Vec;
58185820
const unsigned SubVecVF = getNumElements(V->getType());
5819-
if (Index % SubVecVF == 0) {
5820-
Vec = Builder.CreateInsertVector(Vec->getType(), Vec, V, Index);
5821+
// Create shuffle, insertvector requires that index is multiple of
5822+
// the subvector length.
5823+
const unsigned VecVF = getNumElements(Vec->getType());
5824+
SmallVector<int> Mask(VecVF, PoisonMaskElem);
5825+
if (isa<PoisonValue>(Vec)) {
5826+
auto *Begin = std::next(Mask.begin(), Index);
5827+
std::iota(Begin, std::next(Begin, getNumElements(V->getType())), 0);
5828+
Vec = Builder.CreateShuffleVector(V, Mask);
5829+
return Vec;
5830+
}
5831+
std::iota(Mask.begin(), Mask.end(), 0);
5832+
for (unsigned I : seq<unsigned>(SubVecVF))
5833+
Mask[I + Index] = I + VecVF;
5834+
if (Generator) {
5835+
Vec = Generator(Vec, V, Mask);
58215836
} else {
5822-
// Create shuffle, insertvector requires that index is multiple of
5823-
// the subvector length.
5824-
const unsigned VecVF = getNumElements(Vec->getType());
5825-
SmallVector<int> Mask(VecVF, PoisonMaskElem);
5826-
std::iota(Mask.begin(), Mask.end(), 0);
5827-
for (unsigned I : seq<unsigned>(SubVecVF))
5828-
Mask[I + Index] = I + VecVF;
5829-
if (Generator) {
5830-
Vec = Generator(Vec, V, Mask);
5831-
} else {
5832-
// 1. Resize V to the size of Vec.
5833-
SmallVector<int> ResizeMask(VecVF, PoisonMaskElem);
5834-
std::iota(ResizeMask.begin(), std::next(ResizeMask.begin(), SubVecVF), 0);
5835-
V = Builder.CreateShuffleVector(V, ResizeMask);
5836-
Vec = Builder.CreateShuffleVector(Vec, V, Mask);
5837-
}
5837+
// 1. Resize V to the size of Vec.
5838+
SmallVector<int> ResizeMask(VecVF, PoisonMaskElem);
5839+
std::iota(ResizeMask.begin(), std::next(ResizeMask.begin(), SubVecVF), 0);
5840+
V = Builder.CreateShuffleVector(V, ResizeMask);
5841+
Vec = Builder.CreateShuffleVector(Vec, V, Mask);
58385842
}
58395843
return Vec;
58405844
}
@@ -5844,11 +5848,6 @@ static Value *createInsertVector(
58445848
/// using default shuffle.
58455849
static Value *createExtractVector(IRBuilderBase &Builder, Value *Vec,
58465850
unsigned SubVecVF, unsigned Index) {
5847-
if (Index % SubVecVF == 0) {
5848-
VectorType *SubVecTy =
5849-
getWidenedType(Vec->getType()->getScalarType(), SubVecVF);
5850-
return Builder.CreateExtractVector(SubVecTy, Vec, Index);
5851-
}
58525851
// Create shuffle, extract_subvector requires that index is multiple of
58535852
// the subvector length.
58545853
SmallVector<int> Mask(SubVecVF, PoisonMaskElem);
@@ -16275,8 +16274,8 @@ Value *BoUpSLP::gather(
1627516274
assert(SLPReVec && "FixedVectorType is not expected.");
1627616275
Vec =
1627716276
createInsertVector(Builder, Vec, Scalar, Pos * getNumElements(VecTy));
16278-
auto *II = dyn_cast<IntrinsicInst>(Vec);
16279-
if (!II || II->getIntrinsicID() != Intrinsic::vector_insert)
16277+
auto *II = dyn_cast<Instruction>(Vec);
16278+
if (!II)
1628016279
return Vec;
1628116280
InsElt = II;
1628216281
} else {
@@ -16296,6 +16295,27 @@ Value *BoUpSLP::gather(
1629616295
if (auto *SI = dyn_cast<Instruction>(Scalar))
1629716296
UserOp = SI;
1629816297
} else {
16298+
if (V->getType()->isVectorTy()) {
16299+
if (auto *SV = dyn_cast<ShuffleVectorInst>(InsElt);
16300+
SV && SV->getOperand(0) != V && SV->getOperand(1) != V) {
16301+
// Find shufflevector, caused by resize.
16302+
auto FindOperand = [&](Value *Vec, Value *V) -> Instruction * {
16303+
if (auto *SV = dyn_cast<ShuffleVectorInst>(Vec)) {
16304+
if (SV->getOperand(0) == V)
16305+
return SV;
16306+
if (SV->getOperand(1) == V)
16307+
return SV;
16308+
}
16309+
return nullptr;
16310+
};
16311+
if (Instruction *User = FindOperand(SV->getOperand(0), V))
16312+
InsElt = User;
16313+
else if (Instruction *User = FindOperand(SV->getOperand(1), V))
16314+
InsElt = User;
16315+
assert(InsElt &&
16316+
"Failed to find shufflevector, caused by resize.");
16317+
}
16318+
}
1629916319
UserOp = InsElt;
1630016320
}
1630116321
if (UserOp) {
@@ -16864,10 +16884,13 @@ class BoUpSLP::ShuffleInstructionBuilder final : public BaseShuffleAnalysis {
1686416884
V, SimplifyQuery(*R.DL));
1686516885
}));
1686616886
unsigned InsertionIndex = Idx * getNumElements(ScalarTy);
16887+
Type *OrigScalarTy = ScalarTy;
16888+
ScalarTy = ScalarTy->getScalarType();
1686716889
Vec = createInsertVector(
1686816890
Builder, Vec, V, InsertionIndex,
1686916891
std::bind(&ShuffleInstructionBuilder::createShuffle, this, _1, _2,
1687016892
_3));
16893+
ScalarTy = OrigScalarTy;
1687116894
if (!CommonMask.empty()) {
1687216895
std::iota(std::next(CommonMask.begin(), Idx),
1687316896
std::next(CommonMask.begin(), Idx + E->getVectorFactor()),

llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll

Lines changed: 15 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -567,22 +567,19 @@ define <8 x float> @buildvector_mul_subadd_ps256(<8 x float> %C, <8 x float> %D,
567567
;
568568
; SSE4-LABEL: @buildvector_mul_subadd_ps256(
569569
; SSE4-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]
570-
; SSE4-NEXT: [[TMP0:%.*]] = fsub <8 x float> [[A]], [[B:%.*]]
571-
; SSE4-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
572-
; SSE4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B]]
570+
; SSE4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]
573571
; SSE4-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>
574-
; SSE4-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
575-
; SSE4-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
576-
; SSE4-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
572+
; SSE4-NEXT: [[TMP5:%.*]] = fsub <8 x float> [[A]], [[B]]
573+
; SSE4-NEXT: [[TMP4:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
574+
; SSE4-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
577575
; SSE4-NEXT: ret <8 x float> [[TMP6]]
578576
;
579577
; AVX_FMA4-LABEL: @buildvector_mul_subadd_ps256(
580578
; AVX_FMA4-NEXT: [[A:%.*]] = fmul <8 x float> [[C:%.*]], [[D:%.*]]
581-
; AVX_FMA4-NEXT: [[TMP0:%.*]] = fsub <8 x float> [[A]], [[B:%.*]]
582-
; AVX_FMA4-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
583-
; AVX_FMA4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B]]
579+
; AVX_FMA4-NEXT: [[TMP2:%.*]] = fadd <8 x float> [[A]], [[B:%.*]]
584580
; AVX_FMA4-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>
585-
; AVX_FMA4-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
581+
; AVX_FMA4-NEXT: [[TMP7:%.*]] = fsub <8 x float> [[A]], [[B]]
582+
; AVX_FMA4-NEXT: [[TMP4:%.*]] = shufflevector <8 x float> [[TMP7]], <8 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
586583
; AVX_FMA4-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP3]], <8 x float> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
587584
; AVX_FMA4-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[TMP5]], <8 x float> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
588585
; AVX_FMA4-NEXT: ret <8 x float> [[TMP6]]
@@ -677,13 +674,11 @@ define <16 x float> @buildvector_mul_subadd_ps512(<16 x float> %C, <16 x float>
677674
;
678675
; AVX_FMA-LABEL: @buildvector_mul_subadd_ps512(
679676
; AVX_FMA-NEXT: [[A:%.*]] = fmul <16 x float> [[C:%.*]], [[D:%.*]]
680-
; AVX_FMA-NEXT: [[TMP1:%.*]] = fsub <16 x float> [[A]], [[B:%.*]]
681-
; AVX_FMA-NEXT: [[TMP2:%.*]] = shufflevector <16 x float> [[TMP1]], <16 x float> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
682-
; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <16 x float> [[A]], [[B]]
677+
; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <16 x float> [[A]], [[B:%.*]]
683678
; AVX_FMA-NEXT: [[TMP4:%.*]] = shufflevector <16 x float> [[TMP3]], <16 x float> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
684-
; AVX_FMA-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
685-
; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[TMP4]], <16 x float> [[TMP5]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
686-
; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[TMP6]], <16 x float> poison, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
679+
; AVX_FMA-NEXT: [[TMP5:%.*]] = fsub <16 x float> [[A]], [[B]]
680+
; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <16 x float> [[TMP5]], <16 x float> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
681+
; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <16 x float> [[TMP4]], <16 x float> [[TMP6]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
687682
; AVX_FMA-NEXT: ret <16 x float> [[TMP7]]
688683
;
689684
; AVX512-LABEL: @buildvector_mul_subadd_ps512(
@@ -880,13 +875,11 @@ define <8 x double> @buildvector_mul_subadd_pd512(<8 x double> %C, <8 x double>
880875
;
881876
; AVX_FMA-LABEL: @buildvector_mul_subadd_pd512(
882877
; AVX_FMA-NEXT: [[A:%.*]] = fmul <8 x double> [[C:%.*]], [[D:%.*]]
883-
; AVX_FMA-NEXT: [[TMP1:%.*]] = fsub <8 x double> [[A]], [[B:%.*]]
884-
; AVX_FMA-NEXT: [[TMP2:%.*]] = shufflevector <8 x double> [[TMP1]], <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
885-
; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <8 x double> [[A]], [[B]]
878+
; AVX_FMA-NEXT: [[TMP3:%.*]] = fadd <8 x double> [[A]], [[B:%.*]]
886879
; AVX_FMA-NEXT: [[TMP4:%.*]] = shufflevector <8 x double> [[TMP3]], <8 x double> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 poison, i32 poison, i32 poison, i32 poison>
887-
; AVX_FMA-NEXT: [[TMP5:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
888-
; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <8 x double> [[TMP4]], <8 x double> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
889-
; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
880+
; AVX_FMA-NEXT: [[TMP5:%.*]] = fsub <8 x double> [[A]], [[B]]
881+
; AVX_FMA-NEXT: [[TMP6:%.*]] = shufflevector <8 x double> [[TMP5]], <8 x double> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
882+
; AVX_FMA-NEXT: [[TMP7:%.*]] = shufflevector <8 x double> [[TMP4]], <8 x double> [[TMP6]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
890883
; AVX_FMA-NEXT: ret <8 x double> [[TMP7]]
891884
;
892885
; AVX512-LABEL: @buildvector_mul_subadd_pd512(

llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,10 @@ define void @foo(ptr %0) {
1212
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x ptr> [[TMP2]], <2 x ptr> poison, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
1313
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x ptr> poison, ptr [[TMP0]], i32 0
1414
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x ptr> [[TMP6]], <4 x ptr> poison, <4 x i32> zeroinitializer
15-
; CHECK-NEXT: [[TMP11:%.*]] = call <8 x ptr> @llvm.vector.insert.v8p0.v4p0(<8 x ptr> poison, <4 x ptr> [[TMP3]], i64 0)
16-
; CHECK-NEXT: [[TMP7:%.*]] = call <8 x ptr> @llvm.vector.insert.v8p0.v4p0(<8 x ptr> [[TMP11]], <4 x ptr> [[TMP5]], i64 4)
17-
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <8 x ptr> [[TMP7]], <8 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7, i32 3>
15+
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x ptr> [[TMP3]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
16+
; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x ptr> [[TMP5]], <4 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
17+
; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <4 x ptr> [[TMP3]], <4 x ptr> [[TMP5]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
18+
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <8 x ptr> [[TMP12]], <8 x ptr> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 4, i32 5, i32 6, i32 7, i32 3>
1819
; CHECK-NEXT: [[TMP9:%.*]] = icmp ult <8 x ptr> [[TMP8]], zeroinitializer
1920
; CHECK-NEXT: [[TMP10:%.*]] = and <8 x i1> [[TMP9]], zeroinitializer
2021
; CHECK-NEXT: [[OP_RDX:%.*]] = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> [[TMP10]])

llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ define i32 @test(ptr %c) {
1111
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i64> [[TMP0]], <2 x i64> poison, <6 x i32> <i32 1, i32 1, i32 1, i32 1, i32 0, i32 0>
1212
; CHECK-NEXT: [[TMP2:%.*]] = lshr <6 x i64> [[TMP1]], zeroinitializer
1313
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x i64> [[TMP0]], <2 x i64> poison, <8 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 0, i32 poison, i32 poison>
14-
; CHECK-NEXT: [[TMP4:%.*]] = call <8 x i64> @llvm.vector.insert.v8i64.v6i64(<8 x i64> poison, <6 x i64> [[TMP2]], i64 0)
14+
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <6 x i64> [[TMP2]], <6 x i64> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 poison, i32 poison>
1515
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i64> [[TMP4]], <8 x i64> [[TMP3]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 4, i32 5>
1616
; CHECK-NEXT: [[TMP6:%.*]] = trunc <8 x i64> [[TMP5]] to <8 x i8>
1717
; CHECK-NEXT: store <8 x i8> [[TMP6]], ptr [[INCDEC_PTR_3_1]], align 1

llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -164,7 +164,8 @@ define i32 @getelementptr_2x32(ptr nocapture readonly %g, i32 %n, i32 %x, i32 %y
164164
; CHECK-NEXT: [[T12:%.*]] = load i32, ptr [[ARRAYIDX15]], align 4
165165
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[T10]], i32 2
166166
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[T12]], i32 3
167-
; CHECK-NEXT: [[TMP13:%.*]] = call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> [[TMP8]], <2 x i32> [[TMP6]], i64 0)
167+
; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x i32> [[TMP6]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
168+
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> [[TMP10]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
168169
; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP13]])
169170
; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP14]], [[SUM_032]]
170171
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1

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