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llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp

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@@ -415,16 +415,20 @@ void SystemZPreRASchedStrategy::initialize(ScheduleDAGMI *dag) {
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for (unsigned Idx = 0, End = DAG->SUnits.size(); Idx != End; ++Idx) {
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const SUnit *SU = &DAG->SUnits[Idx];
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bool InDataSequence = true;
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// One Data pred to MI just above, or no preds.
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unsigned NumPreds = 0;
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for (const SDep &Pred : SU->Preds)
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if (++NumPreds != 1 || Pred.getKind() != SDep::Data ||
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Pred.getSUnit()->NodeNum != Idx - 1)
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InDataSequence = false;
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// One Data succ or no succs (ignoring ExitSU).
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unsigned NumSuccs = 0;
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for (const SDep &Succ : SU->Succs)
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if (Succ.getSUnit() != &DAG->ExitSU &&
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(++NumSuccs != 1 || Succ.getKind() != SDep::Data))
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InDataSequence = false;
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// Another type of node or one that does not have a single data pred
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// ends any previous sequence.
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if (!InDataSequence || !NumPreds)
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countSequence();
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if (InDataSequence)

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