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fixup! testing and fixes for RISCVMakeCompressible
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2 files changed

+250
-1
lines changed

2 files changed

+250
-1
lines changed

‎llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -419,7 +419,7 @@ bool RISCVMakeCompressibleOpt::runOnMachineFunction(MachineFunction &Fn) {
419419
BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(RISCV::ADDI), NewReg)
420420
.addReg(RegImm.Reg)
421421
.addImm(RegImm.Imm);
422-
} else if (RISCV::GPRRegClass.contains(RegImm.Reg)) {
422+
} else if (RISCV::GPRF16RegClass.contains(RegImm.Reg)) {
423423
assert(RegImm.Imm == 0);
424424
BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(RISCV::PseudoMV_FPR16INX), NewReg)
425425
.addReg(RegImm.Reg);

‎llvm/test/CodeGen/RISCV/make-compressible-zbc-zhinx.mir‎

Lines changed: 249 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,249 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -o - %s -mtriple=riscv32 -mattr=+zcb,+zhinx -simplify-mir \
3+
# RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s
4+
# RUN: llc -o - %s -mtriple=riscv64 -mattr=+zcb,+zhinx -simplify-mir \
5+
# RUN: -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s
6+
7+
--- |
8+
define void @store_common_value_half(ptr %a, ptr %b, ptr %c) #0 {
9+
entry:
10+
store half 0.0, ptr %a, align 2
11+
store half 0.0, ptr %b, align 2
12+
store half 0.0, ptr %c, align 2
13+
ret void
14+
}
15+
16+
define void @store_common_ptr_half(ptr %p) #0 {
17+
entry:
18+
store volatile half 2.0, ptr %p, align 2
19+
store volatile half 32.0, ptr %p, align 2
20+
store volatile half 512.0, ptr %p, align 2
21+
ret void
22+
}
23+
24+
define void @load_common_ptr_half(ptr %p) #0 {
25+
entry:
26+
%0 = load volatile half, ptr %p, align 2
27+
%1 = load volatile half, ptr %p, align 2
28+
%2 = load volatile half, ptr %p, align 2
29+
ret void
30+
}
31+
32+
define void @store_large_offset_half(ptr %p) #0 {
33+
entry:
34+
%0 = getelementptr inbounds half, ptr %p, i32 100
35+
store volatile half 2.0, ptr %0, align 2
36+
%1 = getelementptr inbounds half, ptr %p, i32 101
37+
store volatile half 32.0, ptr %1, align 2
38+
%2 = getelementptr inbounds half, ptr %p, i32 102
39+
store volatile half 512.0, ptr %2, align 2
40+
%3 = getelementptr inbounds half, ptr %p, i32 103
41+
store volatile half 16384.0, ptr %3, align 2
42+
ret void
43+
}
44+
45+
define void @load_large_offset_half(ptr %p) #0 {
46+
entry:
47+
%0 = getelementptr inbounds half, ptr %p, i32 100
48+
%a = load volatile half, ptr %0, align 2
49+
%1 = getelementptr inbounds half, ptr %p, i32 100
50+
%b = load volatile half, ptr %1, align 2
51+
%2 = getelementptr inbounds half, ptr %p, i32 101
52+
%c = load volatile half, ptr %2, align 2
53+
%3 = getelementptr inbounds half, ptr %p, i32 101
54+
%d = load volatile half, ptr %3, align 2
55+
ret void
56+
}
57+
58+
define void @store_large_offset_no_opt_half(ptr %p) #0 {
59+
entry:
60+
%0 = getelementptr inbounds i8, ptr %p, i8 100
61+
store volatile half 2.0, ptr %0, align 2
62+
%1 = getelementptr inbounds i8, ptr %p, i8 101
63+
store volatile half 32.0, ptr %1, align 2
64+
%2 = getelementptr inbounds i8, ptr %p, i8 104
65+
store volatile half 512.0, ptr %2, align 2
66+
ret void
67+
}
68+
69+
define void @load_large_offset_no_opt_half(ptr %p) #0 {
70+
entry:
71+
%0 = getelementptr inbounds half, ptr %p, i32 100
72+
%a = load volatile half, ptr %0, align 2
73+
%1 = getelementptr inbounds half, ptr %p, i32 101
74+
%c = load volatile half, ptr %1, align 2
75+
%2 = getelementptr inbounds half, ptr %p, i32 102
76+
%d = load volatile half, ptr %2, align 2
77+
ret void
78+
}
79+
80+
attributes #0 = { minsize }
81+
82+
...
83+
---
84+
name: store_common_value_half
85+
tracksRegLiveness: true
86+
body: |
87+
bb.0.entry:
88+
liveins: $x10, $x11, $x12
89+
90+
; CHECK-LABEL: name: store_common_value_half
91+
; CHECK: liveins: $x10, $x11, $x12
92+
; CHECK-NEXT: {{ $}}
93+
; CHECK-NEXT: $x13_h = PseudoMV_FPR16INX $x0_h
94+
; CHECK-NEXT: SH_INX $x13_h, killed renamable $x10, 0 :: (store (s16) into %ir.a)
95+
; CHECK-NEXT: SH_INX $x13_h, killed renamable $x11, 0 :: (store (s16) into %ir.b)
96+
; CHECK-NEXT: SH_INX $x13_h, killed renamable $x12, 0 :: (store (s16) into %ir.c)
97+
; CHECK-NEXT: PseudoRET
98+
SH_INX $x0_h, killed renamable $x10, 0 :: (store (s16) into %ir.a)
99+
SH_INX $x0_h, killed renamable $x11, 0 :: (store (s16) into %ir.b)
100+
SH_INX $x0_h, killed renamable $x12, 0 :: (store (s16) into %ir.c)
101+
PseudoRET
102+
103+
...
104+
---
105+
name: store_common_ptr_half
106+
tracksRegLiveness: true
107+
body: |
108+
bb.0.entry:
109+
liveins: $x16
110+
111+
; CHECK-LABEL: name: store_common_ptr_half
112+
; CHECK: liveins: $x16
113+
; CHECK-NEXT: {{ $}}
114+
; CHECK-NEXT: renamable $x10 = LUI 4
115+
; CHECK-NEXT: $x11 = ADDI $x16, 0
116+
; CHECK-NEXT: SH_INX killed renamable $x10_h, $x11, 0 :: (volatile store (s16) into %ir.p)
117+
; CHECK-NEXT: renamable $x10 = LUI 5
118+
; CHECK-NEXT: SH_INX killed renamable $x10_h, $x11, 0 :: (volatile store (s16) into %ir.p)
119+
; CHECK-NEXT: renamable $x10 = LUI 6
120+
; CHECK-NEXT: SH_INX killed renamable $x10_h, killed $x11, 0 :: (volatile store (s16) into %ir.p)
121+
; CHECK-NEXT: PseudoRET
122+
renamable $x10 = LUI 4
123+
SH_INX killed renamable $x10_h, renamable $x16, 0 :: (volatile store (s16) into %ir.p)
124+
renamable $x10 = LUI 5
125+
SH_INX killed renamable $x10_h, renamable $x16, 0 :: (volatile store (s16) into %ir.p)
126+
renamable $x10 = LUI 6
127+
SH_INX killed renamable $x10_h, killed renamable $x16, 0 :: (volatile store (s16) into %ir.p)
128+
PseudoRET
129+
130+
...
131+
---
132+
name: load_common_ptr_half
133+
body: |
134+
bb.0.entry:
135+
liveins: $x16
136+
137+
; CHECK-LABEL: name: load_common_ptr_half
138+
; CHECK: liveins: $x16
139+
; CHECK-NEXT: {{ $}}
140+
; CHECK-NEXT: $x11 = ADDI $x16, 0
141+
; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.p)
142+
; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.p)
143+
; CHECK-NEXT: dead $x10_h = LH_INX killed $x11, 0 :: (volatile load (s16) from %ir.p)
144+
; CHECK-NEXT: PseudoRET
145+
dead $x10_h = LH_INX renamable $x16, 0 :: (volatile load (s16) from %ir.p)
146+
dead $x10_h = LH_INX renamable $x16, 0 :: (volatile load (s16) from %ir.p)
147+
dead $x10_h = LH_INX killed renamable $x16, 0 :: (volatile load (s16) from %ir.p)
148+
PseudoRET
149+
150+
...
151+
---
152+
name: store_large_offset_half
153+
tracksRegLiveness: true
154+
body: |
155+
bb.0.entry:
156+
liveins: $x10
157+
; CHECK-LABEL: name: store_large_offset_half
158+
; CHECK: liveins: $x10
159+
; CHECK-NEXT: {{ $}}
160+
; CHECK-NEXT: renamable $x11 = LUI 4
161+
; CHECK-NEXT: $x12 = ADDI $x10, 200
162+
; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 0 :: (volatile store (s16) into %ir.0)
163+
; CHECK-NEXT: renamable $x11 = LUI 5
164+
; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 0 :: (volatile store (s16) into %ir.1)
165+
; CHECK-NEXT: renamable $x11 = LUI 6
166+
; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 2 :: (volatile store (s16) into %ir.2)
167+
; CHECK-NEXT: renamable $x11 = LUI 7
168+
; CHECK-NEXT: SH_INX killed renamable $x11_h, killed $x12, 2 :: (volatile store (s16) into %ir.3)
169+
; CHECK-NEXT: PseudoRET
170+
renamable $x11 = LUI 4
171+
SH_INX killed renamable $x11_h, renamable $x10, 200 :: (volatile store (s16) into %ir.0)
172+
renamable $x11 = LUI 5
173+
SH_INX killed renamable $x11_h, renamable $x10, 200 :: (volatile store (s16) into %ir.1)
174+
renamable $x11 = LUI 6
175+
SH_INX killed renamable $x11_h, renamable $x10, 202 :: (volatile store (s16) into %ir.2)
176+
renamable $x11 = LUI 7
177+
SH_INX killed renamable $x11_h, killed renamable $x10, 202 :: (volatile store (s16) into %ir.3)
178+
PseudoRET
179+
180+
...
181+
---
182+
name: load_large_offset_half
183+
tracksRegLiveness: true
184+
body: |
185+
bb.0.entry:
186+
liveins: $x16
187+
188+
; CHECK-LABEL: name: load_large_offset_half
189+
; CHECK: liveins: $x16
190+
; CHECK-NEXT: {{ $}}
191+
; CHECK-NEXT: $x11 = ADDI $x16, 100
192+
; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.0)
193+
; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.1)
194+
; CHECK-NEXT: dead $x10_h = LH_INX $x11, 2 :: (volatile load (s16) from %ir.2)
195+
; CHECK-NEXT: dead $x10_h = LH_INX killed $x11, 2 :: (volatile load (s16) from %ir.3)
196+
; CHECK-NEXT: PseudoRET
197+
dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s16) from %ir.0)
198+
dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s16) from %ir.1)
199+
dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s16) from %ir.2)
200+
dead $x10_h = LH_INX killed renamable $x16, 102 :: (volatile load (s16) from %ir.3)
201+
PseudoRET
202+
203+
...
204+
---
205+
name: store_large_offset_no_opt_half
206+
tracksRegLiveness: true
207+
body: |
208+
bb.0.entry:
209+
liveins: $x16
210+
211+
; CHECK-LABEL: name: store_large_offset_no_opt_half
212+
; CHECK: liveins: $x16
213+
; CHECK-NEXT: {{ $}}
214+
; CHECK-NEXT: renamable $x11 = LUI 4
215+
; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 200 :: (volatile store (s16) into %ir.0)
216+
; CHECK-NEXT: renamable $x11 = LUI 5
217+
; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 202 :: (volatile store (s16) into %ir.1)
218+
; CHECK-NEXT: renamable $x11 = LUI 6
219+
; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 204 :: (volatile store (s16) into %ir.2)
220+
; CHECK-NEXT: PseudoRET
221+
renamable $x11 = LUI 4
222+
SH_INX killed renamable $x11_h, renamable $x16, 200 :: (volatile store (s16) into %ir.0)
223+
renamable $x11 = LUI 5
224+
SH_INX killed renamable $x11_h, renamable $x16, 202 :: (volatile store (s16) into %ir.1)
225+
renamable $x11 = LUI 6
226+
SH_INX killed renamable $x11_h, renamable $x16, 204 :: (volatile store (s16) into %ir.2)
227+
PseudoRET
228+
229+
...
230+
---
231+
name: load_large_offset_no_opt_half
232+
tracksRegLiveness: true
233+
body: |
234+
bb.0.entry:
235+
liveins: $x16
236+
237+
; CHECK-LABEL: name: load_large_offset_no_opt_half
238+
; CHECK: liveins: $x16
239+
; CHECK-NEXT: {{ $}}
240+
; CHECK-NEXT: dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s8) from %ir.0)
241+
; CHECK-NEXT: dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s8) from %ir.1)
242+
; CHECK-NEXT: dead $x10_h = LH_INX killed renamable $x16, 104 :: (volatile load (s8) from %ir.2)
243+
; CHECK-NEXT: PseudoRET
244+
dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s8) from %ir.0)
245+
dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s8) from %ir.1)
246+
dead $x10_h = LH_INX killed renamable $x16, 104 :: (volatile load (s8) from %ir.2)
247+
PseudoRET
248+
249+
...

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