Skip to content

Commit 5790bfe

Browse files
committed
[win/asan] GetInstructionSize: Support some more 3 byte instructions.
This patch adds several instructions seen when trying to run a executable built with ASan with llvm-mingw. (x86 and x86_64, using the git tip in llvm-project). Also includes instructions collected by Roman Pišl and Eric Pouech in the Wine bug reports below. Related: #96270 Co-authored-by: Roman Pišl <[email protected]> https://bugs.winehq.org/show_bug.cgi?id=50993 https://bugs.winehq.org/attachment.cgi?id=70233 Co-authored-by: Eric Pouech <[email protected]> https://bugs.winehq.org/show_bug.cgi?id=52386 https://bugs.winehq.org/attachment.cgi?id=71626
1 parent 56e5ed9 commit 5790bfe

File tree

2 files changed

+50
-0
lines changed

2 files changed

+50
-0
lines changed

compiler-rt/lib/interception/interception_win.cpp

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -639,6 +639,10 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
639639
case 0xD284: // 84 D2 : test dl,dl
640640
return 2;
641641

642+
case 0x3980: // 80 39 XX : cmp BYTE PTR [rcx], XX
643+
case 0x4D8B: // 8B 4D XX : mov XX(%ebp), ecx
644+
case 0x558B: // 8B 55 XX : mov XX(%ebp), edx
645+
case 0x758B: // 8B 75 XX : mov XX(%ebp), esp
642646
case 0xE483: // 83 E4 XX : and esp, XX
643647
case 0xEC83: // 83 EC XX : sub esp, XX
644648
case 0xC1F6: // F6 C1 XX : test cl, XX
@@ -745,6 +749,9 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
745749
case 0xc1ff48: // 48 ff c1 : inc rcx
746750
case 0xc1ff49: // 49 ff c1 : inc r9
747751
case 0xc28b41: // 41 8b c2 : mov eax, r10d
752+
case 0x01b60f: // 0f b6 01 : movzx eax, BYTE PTR [rcx]
753+
case 0x09b60f: // 0f b6 09 : movzx ecx, BYTE PTR [rcx]
754+
case 0x11b60f: // 0f b6 11 : movzx edx, BYTE PTR [rcx]
748755
case 0xc2b60f: // 0f b6 c2 : movzx eax, dl
749756
case 0xc2ff48: // 48 ff c2 : inc rdx
750757
case 0xc2ff49: // 49 ff c2 : inc r10
@@ -763,6 +770,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
763770
case 0xc98548: // 48 85 c9 : test rcx, rcx
764771
case 0xc9854d: // 4d 85 c9 : test r9, r9
765772
case 0xc98b4c: // 4c 8b c9 : mov r9, rcx
773+
case 0xd12948: // 48 29 d1 : sub rcx, rdx
766774
case 0xca2b48: // 48 2b ca : sub rcx, rdx
767775
case 0xca3b48: // 48 3b ca : cmp rcx, rdx
768776
case 0xd12b48: // 48 2b d1 : sub rdx, rcx
@@ -772,16 +780,33 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
772780
case 0xd2854d: // 4d 85 d2 : test r10, r10
773781
case 0xd28b4c: // 4c 8b d2 : mov r10, rdx
774782
case 0xd2b60f: // 0f b6 d2 : movzx edx, dl
783+
case 0xd2be0f: // 0f be d2 : movsx edx, dl
775784
case 0xd98b4c: // 4c 8b d9 : mov r11, rcx
776785
case 0xd9f748: // 48 f7 d9 : neg rcx
786+
case 0xc03145: // 45 31 c0 : xor r8d,r8d
787+
case 0xc93145: // 45 31 c9 : xor r9d,r9d
777788
case 0xdb3345: // 45 33 db : xor r11d, r11d
789+
case 0xc08445: // 45 84 c0 : test r8b,r8b
790+
case 0xd28445: // 45 84 d2 : test r10b,r10b
778791
case 0xdb8548: // 48 85 db : test rbx, rbx
779792
case 0xdb854d: // 4d 85 db : test r11, r11
780793
case 0xdc8b4c: // 4c 8b dc : mov r11, rsp
781794
case 0xe48548: // 48 85 e4 : test rsp, rsp
782795
case 0xe4854d: // 4d 85 e4 : test r12, r12
796+
case 0xc88948: // 48 89 c8 : mov rax,rcx
797+
case 0xcb8948: // 48 89 cb : mov rbx,rcx
798+
case 0xd08948: // 48 89 d0 : mov rax,rdx
799+
case 0xd18948: // 48 89 d1 : mov rcx,rdx
800+
case 0xd38948: // 48 89 d3 : mov rbx,rdx
783801
case 0xe58948: // 48 89 e5 : mov rbp, rsp
784802
case 0xed8548: // 48 85 ed : test rbp, rbp
803+
case 0xc88949: // 49 89 c8 : mov r8, rcx
804+
case 0xc98949: // 49 89 c9 : mov r9, rcx
805+
case 0xca8949: // 49 89 ca : mov r10,rcx
806+
case 0xd08949: // 49 89 d0 : mov r8, rdx
807+
case 0xd18949: // 49 89 d1 : mov r9, rdx
808+
case 0xd28949: // 49 89 d2 : mov r10, rdx
809+
case 0xd38949: // 49 89 d3 : mov r11, rdx
785810
case 0xed854d: // 4d 85 ed : test r13, r13
786811
case 0xf6854d: // 4d 85 f6 : test r14, r14
787812
case 0xff854d: // 4d 85 ff : test r15, r15

compiler-rt/lib/interception/tests/interception_win_test.cpp

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -882,8 +882,12 @@ const struct InstructionSizeData {
882882
{ 2, {0x8B, 0xC1}, 0, "8B C1 : mov eax, ecx"},
883883
{ 2, {0x8B, 0xEC}, 0, "8B EC : mov ebp, esp"},
884884
{ 2, {0x8B, 0xFF}, 0, "8B FF : mov edi, edi"},
885+
{ 3, {0x80, 0x39, 0x72}, 0, "80 39 XX : cmp BYTE PTR [rcx], XX"},
885886
{ 3, {0x83, 0xE4, 0x72}, 0, "83 E4 XX : and esp, XX"},
886887
{ 3, {0x83, 0xEC, 0x72}, 0, "83 EC XX : sub esp, XX"},
888+
{ 3, {0x8B, 0x4D, 0x72}, 0, "8B 4D XX : mov XX(%ebp), ecx"},
889+
{ 3, {0x8B, 0x55, 0x72}, 0, "8B 55 XX : mov XX(%ebp), edx"},
890+
{ 3, {0x8B, 0x75, 0x72}, 0, "8B 75 XX : mov XX(%ebp), esp"},
887891
{ 3, {0xc2, 0x71, 0x72}, 0, "C2 XX XX : ret XX (needed for registering weak functions)"},
888892
{ 5, {0x68, 0x71, 0x72, 0x73, 0x74}, 0, "68 XX XX XX XX : push imm32"},
889893
{ 5, {0xb8, 0x71, 0x72, 0x73, 0x74}, 0, "b8 XX XX XX XX : mov eax, XX XX XX XX"},
@@ -906,17 +910,26 @@ const struct InstructionSizeData {
906910
{ 2, {0x66, 0x90}, 0, "66 90 : Two-byte NOP"},
907911
{ 2, {0x84, 0xc0}, 0, "84 c0 : test al, al"},
908912
{ 2, {0x8a, 0x01}, 0, "8a 01 : mov al, byte ptr [rcx]"},
913+
{ 3, {0x0f, 0xb6, 0x01}, 0, "0f b6 01 : movzx eax, BYTE PTR [rcx]"},
914+
{ 3, {0x0f, 0xb6, 0x09}, 0, "0f b6 09 : movzx ecx, BYTE PTR [rcx]"},
915+
{ 3, {0x0f, 0xb6, 0x11}, 0, "0f b6 11 : movzx edx, BYTE PTR [rcx]"},
909916
{ 3, {0x0f, 0xb6, 0xc2}, 0, "0f b6 c2 : movzx eax, dl"},
910917
{ 3, {0x0f, 0xb6, 0xd2}, 0, "0f b6 d2 : movzx edx, dl"},
911918
{ 3, {0x0f, 0xb7, 0x10}, 0, "0f b7 10 : movzx edx, WORD PTR [rax]"},
919+
{ 3, {0x0f, 0xbe, 0xd2}, 0, "0f be d2 : movsx edx, dl"},
912920
{ 3, {0x41, 0x8b, 0xc0}, 0, "41 8b c0 : mov eax, r8d"},
913921
{ 3, {0x41, 0x8b, 0xc1}, 0, "41 8b c1 : mov eax, r9d"},
914922
{ 3, {0x41, 0x8b, 0xc2}, 0, "41 8b c2 : mov eax, r10d"},
915923
{ 3, {0x41, 0x8b, 0xc3}, 0, "41 8b c3 : mov eax, r11d"},
916924
{ 3, {0x41, 0x8b, 0xc4}, 0, "41 8b c4 : mov eax, r12d"},
925+
{ 3, {0x45, 0x31, 0xc0}, 0, "45 31 c0 : xor r8d,r8d"},
926+
{ 3, {0x45, 0x31, 0xc9}, 0, "45 31 c9 : xor r9d,r9d"},
917927
{ 3, {0x45, 0x33, 0xc0}, 0, "45 33 c0 : xor r8d, r8d"},
918928
{ 3, {0x45, 0x33, 0xc9}, 0, "45 33 c9 : xor r9d, r9d"},
919929
{ 3, {0x45, 0x33, 0xdb}, 0, "45 33 db : xor r11d, r11d"},
930+
{ 3, {0x45, 0x84, 0xc0}, 0, "45 84 c0 : test r8b,r8b"},
931+
{ 3, {0x45, 0x84, 0xd2}, 0, "45 84 d2 : test r10b,r10b"},
932+
{ 3, {0x48, 0x29, 0xd1}, 0, "48 29 d1 : sub rcx, rdx"},
920933
{ 3, {0x48, 0x2b, 0xca}, 0, "48 2b ca : sub rcx, rdx"},
921934
{ 3, {0x48, 0x2b, 0xd1}, 0, "48 2b d1 : sub rdx, rcx"},
922935
{ 3, {0x48, 0x3b, 0xca}, 0, "48 3b ca : cmp rcx, rdx"},
@@ -926,6 +939,11 @@ const struct InstructionSizeData {
926939
{ 3, {0x48, 0x85, 0xdb}, 0, "48 85 db : test rbx, rbx"},
927940
{ 3, {0x48, 0x85, 0xe4}, 0, "48 85 e4 : test rsp, rsp"},
928941
{ 3, {0x48, 0x85, 0xed}, 0, "48 85 ed : test rbp, rbp"},
942+
{ 3, {0x48, 0x89, 0xc8}, 0, "48 89 c8 : mov rax,rcx"},
943+
{ 3, {0x48, 0x89, 0xcb}, 0, "48 89 cb : mov rbx,rcx"},
944+
{ 3, {0x48, 0x89, 0xd0}, 0, "48 89 d0 : mov rax,rdx"},
945+
{ 3, {0x48, 0x89, 0xd1}, 0, "48 89 d1 : mov rcx,rdx"},
946+
{ 3, {0x48, 0x89, 0xd3}, 0, "48 89 d3 : mov rbx,rdx"},
929947
{ 3, {0x48, 0x89, 0xe5}, 0, "48 89 e5 : mov rbp, rsp"},
930948
{ 3, {0x48, 0x8b, 0xc1}, 0, "48 8b c1 : mov rax, rcx"},
931949
{ 3, {0x48, 0x8b, 0xc4}, 0, "48 8b c4 : mov rax, rsp"},
@@ -937,6 +955,13 @@ const struct InstructionSizeData {
937955
{ 3, {0x48, 0xff, 0xc3}, 0, "48 ff c3 : inc rbx"},
938956
{ 3, {0x48, 0xff, 0xc6}, 0, "48 ff c6 : inc rsi"},
939957
{ 3, {0x48, 0xff, 0xc7}, 0, "48 ff c7 : inc rdi"},
958+
{ 3, {0x49, 0x89, 0xc8}, 0, "49 89 c8 : mov r8, rcx"},
959+
{ 3, {0x49, 0x89, 0xc9}, 0, "49 89 c9 : mov r9, rcx"},
960+
{ 3, {0x49, 0x89, 0xca}, 0, "49 89 ca : mov r10,rcx"},
961+
{ 3, {0x49, 0x89, 0xd0}, 0, "49 89 d0 : mov r8, rdx"},
962+
{ 3, {0x49, 0x89, 0xd1}, 0, "49 89 d1 : mov r9, rdx"},
963+
{ 3, {0x49, 0x89, 0xd2}, 0, "49 89 d2 : mov r10, rdx"},
964+
{ 3, {0x49, 0x89, 0xd3}, 0, "49 89 d3 : mov r11, rdx"},
940965
{ 3, {0x49, 0xff, 0xc0}, 0, "49 ff c0 : inc r8"},
941966
{ 3, {0x49, 0xff, 0xc1}, 0, "49 ff c1 : inc r9"},
942967
{ 3, {0x49, 0xff, 0xc2}, 0, "49 ff c2 : inc r10"},

0 commit comments

Comments
 (0)