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[ARM] Update remaining cost tests with -cost-kind=all. NFC
1 parent 93bb5c6 commit 57ccb46

16 files changed

+1908
-2247
lines changed

‎llvm/test/Analysis/CostModel/ARM/add-cast-vect.ll‎

Lines changed: 58 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,6 @@
1-
; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -mtriple=armv7-linux-gnueabihf -mcpu=cortex-a9 | FileCheck --check-prefix=COST %s
1+
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
2+
; RUN: opt < %s -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=armv7-linux-gnueabihf -mcpu=cortex-a9 | FileCheck --check-prefix=COST %s
3+
24
; To see the assembly output: llc -mcpu=cortex-a9 < %s | FileCheck --check-prefix=ASM %s
35
; ASM lines below are only for reference, tests on that direction should go to tests/CodeGen/ARM
46

@@ -15,99 +17,131 @@ target triple = "armv7--linux-gnueabihf"
1517
%T464 = type <4 x i64>
1618

1719
define void @direct(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
18-
; COST: function 'direct'
20+
; COST-LABEL: 'direct'
21+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <4 x i32>, ptr %loadaddr, align 8
22+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <4 x i32>, ptr %loadaddr2, align 8
23+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <4 x i32> %v0, %v1
24+
; COST-NEXT: Cost Model: Found costs of 1 for: store <4 x i32> %r3, ptr %storeaddr, align 8
25+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
26+
;
1927
%v0 = load %T432, ptr %loadaddr
2028
; ASM: vld1.64
2129
%v1 = load %T432, ptr %loadaddr2
2230
; ASM: vld1.64
23-
%r3 = add %T432 %v0, %v1
24-
; COST: cost of 1 for instruction: {{.*}} add <4 x i32>
31+
%r3 = add %T432 %v0, %v1
2532
; ASM: vadd.i32
2633
store %T432 %r3, ptr %storeaddr
2734
; ASM: vst1.64
2835
ret void
2936
}
3037

3138
define void @ups1632(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
32-
; COST: function 'ups1632'
39+
; COST-LABEL: 'ups1632'
40+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <4 x i16>, ptr %loadaddr, align 8
41+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <4 x i16>, ptr %loadaddr2, align 8
42+
; COST-NEXT: Cost Model: Found costs of 0 for: %r1 = sext <4 x i16> %v0 to <4 x i32>
43+
; COST-NEXT: Cost Model: Found costs of 0 for: %r2 = sext <4 x i16> %v1 to <4 x i32>
44+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <4 x i32> %r1, %r2
45+
; COST-NEXT: Cost Model: Found costs of 1 for: store <4 x i32> %r3, ptr %storeaddr, align 8
46+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
47+
;
3348
%v0 = load %T416, ptr %loadaddr
3449
; ASM: vldr
3550
%v1 = load %T416, ptr %loadaddr2
3651
; ASM: vldr
3752
%r1 = sext %T416 %v0 to %T432
3853
%r2 = sext %T416 %v1 to %T432
39-
; COST: cost of 0 for instruction: {{.*}} sext <4 x i16> {{.*}} to <4 x i32>
40-
%r3 = add %T432 %r1, %r2
41-
; COST: cost of 1 for instruction: {{.*}} add <4 x i32>
54+
%r3 = add %T432 %r1, %r2
4255
; ASM: vaddl.s16
4356
store %T432 %r3, ptr %storeaddr
4457
; ASM: vst1.64
4558
ret void
4659
}
4760

4861
define void @upu1632(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
49-
; COST: function 'upu1632'
62+
; COST-LABEL: 'upu1632'
63+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <4 x i16>, ptr %loadaddr, align 8
64+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <4 x i16>, ptr %loadaddr2, align 8
65+
; COST-NEXT: Cost Model: Found costs of 0 for: %r1 = zext <4 x i16> %v0 to <4 x i32>
66+
; COST-NEXT: Cost Model: Found costs of 0 for: %r2 = zext <4 x i16> %v1 to <4 x i32>
67+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <4 x i32> %r1, %r2
68+
; COST-NEXT: Cost Model: Found costs of 1 for: store <4 x i32> %r3, ptr %storeaddr, align 8
69+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
70+
;
5071
%v0 = load %T416, ptr %loadaddr
5172
; ASM: vldr
5273
%v1 = load %T416, ptr %loadaddr2
5374
; ASM: vldr
5475
%r1 = zext %T416 %v0 to %T432
5576
%r2 = zext %T416 %v1 to %T432
56-
; COST: cost of 0 for instruction: {{.*}} zext <4 x i16> {{.*}} to <4 x i32>
57-
%r3 = add %T432 %r1, %r2
58-
; COST: cost of 1 for instruction: {{.*}} add <4 x i32>
77+
%r3 = add %T432 %r1, %r2
5978
; ASM: vaddl.u16
6079
store %T432 %r3, ptr %storeaddr
6180
; ASM: vst1.64
6281
ret void
6382
}
6483

6584
define void @ups3264(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
66-
; COST: function 'ups3264'
85+
; COST-LABEL: 'ups3264'
86+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <2 x i32>, ptr %loadaddr, align 8
87+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <2 x i32>, ptr %loadaddr2, align 8
88+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <2 x i32> %v0, %v1
89+
; COST-NEXT: Cost Model: Found costs of 1 for: %st = sext <2 x i32> %r3 to <2 x i64>
90+
; COST-NEXT: Cost Model: Found costs of 1 for: store <2 x i64> %st, ptr %storeaddr, align 8
91+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
92+
;
6793
%v0 = load %T232, ptr %loadaddr
6894
; ASM: vldr
6995
%v1 = load %T232, ptr %loadaddr2
7096
; ASM: vldr
71-
%r3 = add %T232 %v0, %v1
97+
%r3 = add %T232 %v0, %v1
7298
; ASM: vadd.i32
73-
; COST: cost of 1 for instruction: {{.*}} add <2 x i32>
7499
%st = sext %T232 %r3 to %T264
75100
; ASM: vmovl.s32
76-
; COST: cost of 1 for instruction: {{.*}} sext <2 x i32> {{.*}} to <2 x i64>
77101
store %T264 %st, ptr %storeaddr
78102
; ASM: vst1.64
79103
ret void
80104
}
81105

82106
define void @upu3264(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
83-
; COST: function 'upu3264'
107+
; COST-LABEL: 'upu3264'
108+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <2 x i32>, ptr %loadaddr, align 8
109+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <2 x i32>, ptr %loadaddr2, align 8
110+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <2 x i32> %v0, %v1
111+
; COST-NEXT: Cost Model: Found costs of 1 for: %st = zext <2 x i32> %r3 to <2 x i64>
112+
; COST-NEXT: Cost Model: Found costs of 1 for: store <2 x i64> %st, ptr %storeaddr, align 8
113+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
114+
;
84115
%v0 = load %T232, ptr %loadaddr
85116
; ASM: vldr
86117
%v1 = load %T232, ptr %loadaddr2
87118
; ASM: vldr
88-
%r3 = add %T232 %v0, %v1
119+
%r3 = add %T232 %v0, %v1
89120
; ASM: vadd.i32
90-
; COST: cost of 1 for instruction: {{.*}} add <2 x i32>
91121
%st = zext %T232 %r3 to %T264
92122
; ASM: vmovl.u32
93-
; COST: cost of 1 for instruction: {{.*}} zext <2 x i32> {{.*}} to <2 x i64>
94123
store %T264 %st, ptr %storeaddr
95124
; ASM: vst1.64
96125
ret void
97126
}
98127

99128
define void @dn3216(ptr %loadaddr, ptr %loadaddr2, ptr %storeaddr) {
100-
; COST: function 'dn3216'
129+
; COST-LABEL: 'dn3216'
130+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v0 = load <4 x i32>, ptr %loadaddr, align 8
131+
; COST-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:4 SizeLat:1 for: %v1 = load <4 x i32>, ptr %loadaddr2, align 8
132+
; COST-NEXT: Cost Model: Found costs of 1 for: %r3 = add <4 x i32> %v0, %v1
133+
; COST-NEXT: Cost Model: Found costs of 1 for: %st = trunc <4 x i32> %r3 to <4 x i16>
134+
; COST-NEXT: Cost Model: Found costs of 1 for: store <4 x i16> %st, ptr %storeaddr, align 8
135+
; COST-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
136+
;
101137
%v0 = load %T432, ptr %loadaddr
102138
; ASM: vld1.64
103139
%v1 = load %T432, ptr %loadaddr2
104140
; ASM: vld1.64
105-
%r3 = add %T432 %v0, %v1
141+
%r3 = add %T432 %v0, %v1
106142
; ASM: vadd.i32
107-
; COST: cost of 1 for instruction: {{.*}} add <4 x i32>
108143
%st = trunc %T432 %r3 to %T416
109144
; ASM: vmovn.i32
110-
; COST: cost of 1 for instruction: {{.*}} trunc <4 x i32> {{.*}} to <4 x i16>
111145
store %T416 %st, ptr %storeaddr
112146
; ASM: vstr
113147
ret void

‎llvm/test/Analysis/CostModel/ARM/cast_ldst.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=thumbv7-apple-ios6.0.0 -mcpu=cortex-a9 < %s | FileCheck %s --check-prefix=CHECK-NEON
3-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve.fp < %s | FileCheck %s --check-prefix=CHECK-MVE
4-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s --check-prefix=CHECK-V8M-MAIN
5-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=thumbv8m.base-none-eabi < %s | FileCheck %s --check-prefix=CHECK-V8M-BASE
6-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=all -mtriple=armv8r-none-eabi -mattr=+neon,+fp-armv8 < %s | FileCheck %s --check-prefix=CHECK-V8R
2+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=thumbv7-apple-ios6.0.0 -mcpu=cortex-a9 < %s | FileCheck %s --check-prefix=CHECK-NEON
3+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve.fp < %s | FileCheck %s --check-prefix=CHECK-MVE
4+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s --check-prefix=CHECK-V8M-MAIN
5+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=thumbv8m.base-none-eabi < %s | FileCheck %s --check-prefix=CHECK-V8M-BASE
6+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=armv8r-none-eabi -mattr=+neon,+fp-armv8 < %s | FileCheck %s --check-prefix=CHECK-V8R
77

88
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
99

‎llvm/test/Analysis/CostModel/ARM/freeshift.ll‎

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,23 @@
11
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2-
; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=thumbv8.1m.main-none-eabi < %s | FileCheck %s
2+
; RUN: opt -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -mtriple=thumbv8.1m.main-none-eabi < %s | FileCheck %s
33

44
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
55

66
define void @shl(i32 %a, i32 %b) {
77
; CHECK-LABEL: 'shl'
8-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = shl i32 %a, 3
9-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
10-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = shl i32 %a, 3
11-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
12-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = shl i32 %a, 3
13-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
14-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = shl i32 %a, 3
15-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
16-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = shl i32 %a, 3
17-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
18-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = shl i32 %a, 3
19-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
20-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
8+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %as = shl i32 %a, 3
9+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ac = add i32 %b, %as
10+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ss = shl i32 %a, 3
11+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %sc = sub i32 %b, %ss
12+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %xs = shl i32 %a, 3
13+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %xc = xor i32 %b, %xs
14+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ns = shl i32 %a, 3
15+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %nc = and i32 %b, %ns
16+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %os = shl i32 %a, 3
17+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %oc = or i32 %b, %os
18+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %is = shl i32 %a, 3
19+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ic = icmp eq i32 %b, %is
20+
; CHECK-NEXT: Cost Model: Found costs of 1 for: ret void
2121
;
2222
%as = shl i32 %a, 3
2323
%ac = add i32 %b, %as
@@ -36,19 +36,19 @@ define void @shl(i32 %a, i32 %b) {
3636

3737
define void @ashr(i32 %a, i32 %b) {
3838
; CHECK-LABEL: 'ashr'
39-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = ashr i32 %a, 3
40-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
41-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = ashr i32 %a, 3
42-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
43-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = ashr i32 %a, 3
44-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
45-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = ashr i32 %a, 3
46-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
47-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = ashr i32 %a, 3
48-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
49-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = ashr i32 %a, 3
50-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
51-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
39+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %as = ashr i32 %a, 3
40+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ac = add i32 %b, %as
41+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ss = ashr i32 %a, 3
42+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %sc = sub i32 %b, %ss
43+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %xs = ashr i32 %a, 3
44+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %xc = xor i32 %b, %xs
45+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ns = ashr i32 %a, 3
46+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %nc = and i32 %b, %ns
47+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %os = ashr i32 %a, 3
48+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %oc = or i32 %b, %os
49+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %is = ashr i32 %a, 3
50+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ic = icmp eq i32 %b, %is
51+
; CHECK-NEXT: Cost Model: Found costs of 1 for: ret void
5252
;
5353
%as = ashr i32 %a, 3
5454
%ac = add i32 %b, %as
@@ -67,19 +67,19 @@ define void @ashr(i32 %a, i32 %b) {
6767

6868
define void @lshr(i32 %a, i32 %b) {
6969
; CHECK-LABEL: 'lshr'
70-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = lshr i32 %a, 3
71-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
72-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = lshr i32 %a, 3
73-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
74-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = lshr i32 %a, 3
75-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
76-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = lshr i32 %a, 3
77-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
78-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = lshr i32 %a, 3
79-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
80-
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = lshr i32 %a, 3
81-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
82-
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
70+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %as = lshr i32 %a, 3
71+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ac = add i32 %b, %as
72+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ss = lshr i32 %a, 3
73+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %sc = sub i32 %b, %ss
74+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %xs = lshr i32 %a, 3
75+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %xc = xor i32 %b, %xs
76+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %ns = lshr i32 %a, 3
77+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %nc = and i32 %b, %ns
78+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %os = lshr i32 %a, 3
79+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %oc = or i32 %b, %os
80+
; CHECK-NEXT: Cost Model: Found costs of 0 for: %is = lshr i32 %a, 3
81+
; CHECK-NEXT: Cost Model: Found costs of 1 for: %ic = icmp eq i32 %b, %is
82+
; CHECK-NEXT: Cost Model: Found costs of 1 for: ret void
8383
;
8484
%as = lshr i32 %a, 3
8585
%ac = add i32 %b, %as

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