Add test

Author: MacDue

llvm/test/CodeGen/AArch64/aarch64-sme-stubs.ll

@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple aarch64-none-linux-gnu | FileCheck %s
+
+; Checks SME ABI routines can be implemented as stubs without +sme.
+
+define i1 @__aarch64_sme_accessible() {
+; CHECK-LABEL: __aarch64_sme_accessible:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w0, #1 // =0x1
+; CHECK-NEXT:    ret
+entry:
+  ret i1 true
+}
+
+define [2 x i64] @__arm_sme_state() {
+; CHECK-LABEL: __arm_sme_state:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov x0, xzr
+; CHECK-NEXT:    mov x1, xzr
+; CHECK-NEXT:    ret
+entry:
+  ret [2 x i64] zeroinitializer
+}
+
+define void @__arm_tpidr2_restore() {
+; CHECK-LABEL: __arm_tpidr2_restore:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ret
+entry:
+  ret void
+}
+
+define void @__arm_tpidr2_save() {
+; CHECK-LABEL: __arm_tpidr2_save:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ret
+entry:
+  ret void
+}
+
+define void @__arm_za_disable() {
+; CHECK-LABEL: __arm_za_disable:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ret
+gientry:
+  ret void
+}