@@ -3249,22 +3249,22 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
32493249 return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
32503250
32513251 case AArch64::AUTx16x17:
3252- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3253- &AArch64::GPR64noipRegClass);
3252+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3253+ &AArch64::GPR64noipRegClass);
32543254 return BB;
32553255 case AArch64::AUTxMxN:
3256- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3257- &AArch64::GPR64noipRegClass);
3256+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3257+ &AArch64::GPR64noipRegClass);
32583258 return BB;
32593259 case AArch64::PAC:
32603260 fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
32613261 &AArch64::GPR64noipRegClass);
32623262 return BB;
32633263 case AArch64::AUTPAC:
3264- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3265- &AArch64::GPR64noipRegClass);
3266- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3267- &AArch64::GPR64noipRegClass);
3264+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3265+ &AArch64::GPR64noipRegClass);
3266+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3267+ &AArch64::GPR64noipRegClass);
32683268 return BB;
32693269 }
32703270}
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