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‎mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp‎

Lines changed: 21 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#include "mlir/Dialect/XeGPU/Transforms/Passes.h"
1717
#include "mlir/Dialect/XeGPU/Transforms/Transforms.h"
1818
#include "mlir/IR/Builders.h"
19+
#include "mlir/Support/LLVM.h"
1920
#include "llvm/Support/raw_ostream.h"
2021

2122
namespace mlir {
@@ -242,10 +243,6 @@ class SGMapPropagation : public SparseBackwardDataFlowAnalysis<SGMapLattice> {
242243
ArrayRef<SGMapLattice *> operands,
243244
ArrayRef<const SGMapLattice *> results);
244245

245-
void visitCreateNdDescOp(xegpu::CreateNdDescOp createNdDesc,
246-
ArrayRef<SGMapLattice *> operands,
247-
ArrayRef<const SGMapLattice *> results);
248-
249246
void visitCreateDescOp(xegpu::CreateDescOp createDesc,
250247
ArrayRef<SGMapLattice *> operands,
251248
ArrayRef<const SGMapLattice *> results);
@@ -296,8 +293,6 @@ SGMapPropagation::visitOperation(Operation *op,
296293
visitVectorBitcastOp(bitcast, operands, results);
297294
else if (auto loadGather = dyn_cast<xegpu::LoadGatherOp>(op))
298295
visitLoadGatherOp(loadGather, operands, results);
299-
else if (auto createNdDesc = dyn_cast<xegpu::CreateNdDescOp>(op))
300-
visitCreateNdDescOp(createNdDesc, operands, results);
301296
else if (auto createDesc = dyn_cast<xegpu::CreateDescOp>(op))
302297
visitCreateDescOp(createDesc, operands, results);
303298
else if (auto storeScatter = dyn_cast<xegpu::StoreScatterOp>(op))
@@ -306,6 +301,10 @@ SGMapPropagation::visitOperation(Operation *op,
306301
visitUpdateNdOffsetOp(updateNdOffset, operands, results);
307302
else if (auto reduction = dyn_cast<vector::MultiDimReductionOp>(op))
308303
visitVectorMultiReductionOp(reduction, operands, results);
304+
/// No need to propagate the layout to operands in CreateNdDescOp because they
305+
/// are scalars (offsets, sizes, etc.).
306+
else if (auto createNdDesc = dyn_cast<xegpu::CreateNdDescOp>(op))
307+
return success();
309308
/// All other ops
310309
else {
311310
for (const SGMapLattice *r : results) {
@@ -355,11 +354,6 @@ void SGMapPropagation::visitUpdateNdOffsetOp(
355354
return;
356355
/// Propagate the layout to the source operand.
357356
propagateIfChanged(operands[0], operands[0]->meet(resultLayout));
358-
/// For all other operands use 1D default layout.
359-
SGMap layout = getDefaultSgMap(1);
360-
for (size_t i = 1; i < operands.size(); ++i) {
361-
propagateIfChanged(operands[i], operands[i]->meet(layout));
362-
}
363357
}
364358

365359
/// Set the layouts for DPAS A, B, and C operands.
@@ -403,7 +397,8 @@ void SGMapPropagation::visitLoadNdOp(xegpu::LoadNdOp load,
403397
/// LoadNdOp has the transpose effect. However, at the stage of this analyis
404398
/// this effect is not expected and should be abstracted away. Emit a warning.
405399
if (auto transpose = load.getTranspose()) {
406-
load.emitWarning("Transpose effect is not expected for LoadNdOp");
400+
load.emitWarning("Transpose effect is not expected for LoadNdOp at "
401+
"SGMapPropagation stage.");
407402
tensorDescLayout = valueLayout.getTransposedLayout(transpose.value());
408403
}
409404
/// Propagate the new layout to the tensor descriptor operand.
@@ -476,7 +471,8 @@ void SGMapPropagation::visitLoadGatherOp(
476471
/// LoadGatherOp has the transpose effect. However, at the stage of this
477472
/// analyis this effect is not expected and should be abstracted away. Emit
478473
/// a warning.
479-
load.emitWarning("Transpose effect is not expected for LoadGatherOp");
474+
load.emitWarning("Transpose effect is not expected for LoadGatherOp at "
475+
"SGMapPropagation stage.");
480476
tensorDescLayout = valueLayout.getTransposedLayout({1, 0});
481477
} else
482478
tensorDescLayout = valueLayout;
@@ -488,24 +484,7 @@ void SGMapPropagation::visitLoadGatherOp(
488484
propagateIfChanged(operands[1], operands[1]->meet(maskLayout));
489485
}
490486

491-
/// Propagate the layout of the descriptor to the operands in CreateNdDescOp.
492-
void SGMapPropagation::visitCreateNdDescOp(
493-
xegpu::CreateNdDescOp createNdDesc, ArrayRef<SGMapLattice *> operands,
494-
ArrayRef<const SGMapLattice *> results) {
495-
auto descLayout = results[0]->getValue();
496-
/// Need the layout of the descriptor to propagate to the operands.
497-
if (!descLayout.isAssigned())
498-
return;
499-
/// Propagate the layout to the source operand.
500-
propagateIfChanged(operands[0], operands[0]->meet(descLayout));
501-
/// For all other operands use 1D default layout.
502-
SGMap layout = getDefaultSgMap(1);
503-
for (size_t i = 1; i < operands.size(); ++i) {
504-
propagateIfChanged(operands[i], operands[i]->meet(layout));
505-
}
506-
}
507-
508-
/// Propagate the layout of the descriptor to the source and offset operands in
487+
/// Propagate the layout of the descriptor to the vector offset operand in
509488
/// CreateDescOp.
510489
void SGMapPropagation::visitCreateDescOp(
511490
xegpu::CreateDescOp createDesc, ArrayRef<SGMapLattice *> operands,
@@ -514,8 +493,6 @@ void SGMapPropagation::visitCreateDescOp(
514493
/// Need the layout of the descriptor to propagate to the operands.
515494
if (!descLayout.isAssigned())
516495
return;
517-
/// Propagate the layout to the source operand.
518-
propagateIfChanged(operands[0], operands[0]->meet(descLayout));
519496
/// For offset operand propagate 1D default layout.
520497
SGMap layout = getDefaultSgMap(1);
521498
propagateIfChanged(operands[1], operands[1]->meet(layout));
@@ -526,14 +503,23 @@ void SGMapPropagation::visitCreateDescOp(
526503
void SGMapPropagation::visitStoreScatterOp(
527504
xegpu::StoreScatterOp storeScatter, ArrayRef<SGMapLattice *> operands,
528505
ArrayRef<const SGMapLattice *> results) {
506+
/// Currently, for 2D StoreScatterOp we expect that the height dimension of
507+
/// the tensor descriptor is evenly divisible by the subgroup size.
508+
/// TODO: Add support for other 2D shapes.
509+
auto tdescShape = storeScatter.getTensorDescType().getShape();
510+
if (tdescShape.size() > 1 && tdescShape[0] % subgroupSize != 0) {
511+
storeScatter.emitError("Height dimension of the tensor descriptor should "
512+
"be evenly divisible by the subgroup size.");
513+
return;
514+
}
529515
auto valueLayout = getDefaultSgMap(storeScatter.getValueType());
530516
SGMap storeScatterLayout;
531517
if (storeScatter.getTranspose()) {
532518
/// StoreScatteOp allows transpose effect. However, at the stage of this
533519
/// analyis this effect is not expected and should be abstracted away. Emit
534520
/// a warning.
535-
storeScatter.emitWarning(
536-
"Transpose effect is not expected for StoreScatterOp");
521+
storeScatter.emitWarning("Transpose effect is not expected for "
522+
"StoreScatterOp at SGMapPropagation stage.");
537523
storeScatterLayout = valueLayout.getTransposedLayout({1, 0});
538524
} else
539525
storeScatterLayout = valueLayout;

‎mlir/test/Dialect/XeGPU/subgroup-map-propagation.mlir‎

Lines changed: 42 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,14 @@
11
// RUN: mlir-opt -xegpu-subgroup-distribute='print-analysis-only=true' -split-input-file %s | FileCheck %s
22

3-
// CHECK: function: test_dpas_op_1:
4-
// CHECK: op : %{{.*}} = arith.constant 0 : index
5-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
3+
// CHECK: function: test_dpas_f16:
4+
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf16>' at index: 0
5+
// CHECK-NEXT: sg_map : Not assigned.
6+
// CHECK-NEXT: argument: <block argument> of type 'memref<16x16xf16>' at index: 1
7+
// CHECK-NEXT: sg_map : Not assigned.
8+
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
9+
// CHECK-NEXT: sg_map : Not assigned.
10+
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
11+
// CHECK-NEXT: sg_map for result #0: Not assigned.
612
// CHECK-NEXT: op : %{{.*}} = arith.constant dense<0.000000e+00> : vector<8x16xf32>
713
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
814
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xf16> -> !xegpu.tensor_desc<8x16xf16>
@@ -17,7 +23,7 @@
1723
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
1824
// CHECK-NEXT: op : %{{.*}} = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xf32> -> !xegpu.tensor_desc<8x16xf32>
1925
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
20-
func.func @test_dpas_op_1(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>, %arg2: memref<8x16xf32>) {
26+
func.func @test_dpas_f16(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>, %arg2: memref<8x16xf32>) {
2127
%c0 = arith.constant 0 : index
2228
%cst = arith.constant dense<0.000000e+00> : vector<8x16xf32>
2329
%0 = xegpu.create_nd_tdesc %arg0[%c0, %c0] : memref<8x16xf16> -> !xegpu.tensor_desc<8x16xf16>
@@ -32,20 +38,20 @@ func.func @test_dpas_op_1(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>, %ar
3238

3339

3440
// -----
35-
// CHECK: function: test_dpas_op_2:
41+
// CHECK: function: test_dpas_i8:
3642
// CHECK-NEXT: argument: <block argument> of type 'vector<8x32xi8>' at index: 0
3743
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 2]
3844
// CHECK-NEXT: argument: <block argument> of type 'vector<32x16xi8>' at index: 1
3945
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [4, 1]
4046
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xi32>' at index: 2
41-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
47+
// CHECK-NEXT: sg_map : Not assigned.
4248
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
43-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
49+
// CHECK-NEXT: sg_map for result #0: Not assigned.
4450
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.dpas %{{.*}} : vector<8x32xi8>, vector<32x16xi8> -> vector<8x16xi32>
4551
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
4652
// CHECK-NEXT: op : %[[T1:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xi32> -> !xegpu.tensor_desc<8x16xi32>
4753
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
48-
func.func @test_dpas_op_2(%arg0: vector<8x32xi8>, %arg1: vector<32x16xi8>, %arg2: memref<8x16xi32>) {
54+
func.func @test_dpas_i8(%arg0: vector<8x32xi8>, %arg1: vector<32x16xi8>, %arg2: memref<8x16xi32>) {
4955
%c0 = arith.constant 0 : index
5056
%0 = xegpu.dpas %arg0, %arg1 : vector<8x32xi8>, vector<32x16xi8> -> vector<8x16xi32>
5157
%1 = xegpu.create_nd_tdesc %arg2[%c0, %c0] : memref<8x16xi32> -> !xegpu.tensor_desc<8x16xi32>
@@ -56,13 +62,13 @@ func.func @test_dpas_op_2(%arg0: vector<8x32xi8>, %arg1: vector<32x16xi8>, %arg2
5662
// -----
5763
// CHECK: function: test_transpose_op_1:
5864
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf16>' at index: 0
59-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
65+
// CHECK-NEXT: sg_map : Not assigned.
6066
// CHECK-NEXT: argument: <block argument> of type 'memref<16x16xf16>' at index: 1
61-
// CHECK-NEXT: sg_map : wi_layout: [16, 1], wi_data: [1, 2]
67+
// CHECK-NEXT: sg_map : Not assigned.
6268
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
63-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
69+
// CHECK-NEXT: sg_map : Not assigned.
6470
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
65-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
71+
// CHECK-NEXT: sg_map for result #0: Not assigned.
6672
// CHECK-NEXT: op : %[[CST:.*]] = arith.constant dense<0.000000e+00> : vector<8x16xf32>
6773
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
6874
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xf16> -> !xegpu.tensor_desc<8x16xf16>
@@ -92,13 +98,13 @@ func.func @test_transpose_op_1(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>
9298

9399
// -----
94100
// CHECK: argument: <block argument> of type 'memref<8x16xf16>' at index: 0
95-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
101+
// CHECK-NEXT: sg_map : Not assigned.
96102
// CHECK-NEXT: argument: <block argument> of type 'memref<16x16xf16>' at index: 1
97-
// CHECK-NEXT: sg_map : wi_layout: [16, 1], wi_data: [1, 2]
103+
// CHECK-NEXT: sg_map : Not assigned.
98104
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
99-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
105+
// CHECK-NEXT: sg_map : Not assigned.
100106
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
101-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
107+
// CHECK-NEXT: sg_map for result #0: Not assigned.
102108
// CHECK-NEXT: op : %[[CST:.*]] = arith.constant dense<0.000000e+00> : vector<8x16xf32>
103109
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
104110
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xf16> -> !xegpu.tensor_desc<8x16xf16>
@@ -156,13 +162,13 @@ func.func @test_extf_truncf_op(%arg0: !xegpu.tensor_desc<8x16xf16>, %arg1: !xegp
156162
// -----
157163
// CHECK: function: test_load_gather_op_1:
158164
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf16>' at index: 0
159-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
165+
// CHECK-NEXT: sg_map : Not assigned.
160166
// CHECK-NEXT: argument: <block argument> of type 'memref<256xf16>' at index: 1
161-
// CHECK-NEXT: sg_map : wi_layout: [16, 1], wi_data: [1, 2]
167+
// CHECK-NEXT: sg_map : Not assigned.
162168
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
163-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
169+
// CHECK-NEXT: sg_map : Not assigned.
164170
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
165-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
171+
// CHECK-NEXT: sg_map for result #0: Not assigned.
166172
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xf16> -> !xegpu.tensor_desc<8x16xf16>
167173
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
168174
// CHECK-NEXT: op : %[[T1:.*]] = xegpu.load_nd %[[T0]] : !xegpu.tensor_desc<8x16xf16> -> vector<8x16xf16>
@@ -195,7 +201,7 @@ func.func @test_load_gather_op_1(%arg0: memref<8x16xf16>, %arg1: memref<256xf16>
195201

196202
// -----
197203
// CHECK: argument: <block argument> of type 'memref<256xf32>' at index: 0
198-
// CHECK-NEXT: sg_map : wi_layout: [16], wi_data: [1]
204+
// CHECK-NEXT: sg_map : Not assigned.
199205
// CHECK-NEXT: argument: <block argument> of type '!xegpu.tensor_desc<16xf32>' at index: 1
200206
// CHECK-NEXT: sg_map : wi_layout: [16], wi_data: [1]
201207
// CHECK-NEXT: op : %[[CST:.*]] = arith.constant dense<[0, 16, 32, 48, 64, 80, 96, 112, 128, 144, 160, 176, 192, 208, 224, 240]> : vector<16xindex>
@@ -217,7 +223,7 @@ func.func @test_load_gather_op_2(%arg0: memref<256xf32>, %arg1: !xegpu.tensor_de
217223

218224
// -----
219225
// CHECK: argument: <block argument> of type 'memref<128xf32>' at index: 0
220-
// CHECK-NEXT: sg_map : wi_layout: [16, 1], wi_data: [1, 1]
226+
// CHECK-NEXT: sg_map : Not assigned.
221227
// CHECK-NEXT: op : %[[CST:.*]] = arith.constant dense<1.000000e+00> : vector<8x16xf32>
222228
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
223229
// CHECK-NEXT: op : %[[CST0:.*]] = arith.constant dense<true> : vector<16xi1>
@@ -239,7 +245,7 @@ func.func @test_store_scatter_op_1(%arg0: memref<128xf32>) {
239245
// CHECK: argument: <block argument> of type 'vector<16xf32>' at index: 0
240246
// CHECK-NEXT: sg_map : wi_layout: [16], wi_data: [1]
241247
// CHECK-NEXT: argument: <block argument> of type 'memref<256xf32>' at index: 1
242-
// CHECK-NEXT: sg_map : wi_layout: [16], wi_data: [1]
248+
// CHECK-NEXT: sg_map : Not assigned.
243249
// CHECK-NEXT: op : %[[CST:.*]] = arith.constant dense<[0, 16, 32, 48, 64, 80, 96, 112, 128, 144, 160, 176, 192, 208, 224, 240]> : vector<16xindex>
244250
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
245251
// CHECK-NEXT: op : %[[CST1:.*]] = arith.constant dense<true> : vector<16xi1>
@@ -256,13 +262,13 @@ func.func @test_store_scatter_op_2(%arg0: vector<16xf32>, %arg1: memref<256xf32>
256262

257263
// -----
258264
// CHECK: argument: <block argument> of type 'memref<8x16xi16>' at index: 0
259-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
265+
// CHECK-NEXT: sg_map : Not assigned.
260266
// CHECK-NEXT: argument: <block argument> of type 'memref<32x16xi8>' at index: 1
261-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [4, 1]
267+
// CHECK-NEXT: sg_map : Not assigned.
262268
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xi32>' at index: 2
263-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
269+
// CHECK-NEXT: sg_map : Not assigned.
264270
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
265-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
271+
// CHECK-NEXT: sg_map for result #0: Not assigned.
266272
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x16xi16> -> !xegpu.tensor_desc<8x16xi16>
267273
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
268274
// CHECK-NEXT: op : %[[T1:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<32x16xi8> -> !xegpu.tensor_desc<32x16xi8>
@@ -292,13 +298,13 @@ func.func @test_vector_bitcast_op_1(%arg0: memref<8x16xi16>, %arg1: memref<32x16
292298

293299
// -----
294300
// CHECK: argument: <block argument> of type 'memref<8x32xi8>' at index: 0
295-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 2]
301+
// CHECK-NEXT: sg_map : Not assigned.
296302
// CHECK-NEXT: argument: <block argument> of type 'memref<16x32xi8>' at index: 1
297-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [4, 1]
303+
// CHECK-NEXT: sg_map : Not assigned.
298304
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
299-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
305+
// CHECK-NEXT: sg_map : Not assigned.
300306
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
301-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
307+
// CHECK-NEXT: sg_map for result #0: Not assigned.
302308
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x32xi8> -> !xegpu.tensor_desc<8x32xi8>
303309
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 2]
304310
// CHECK-NEXT: op : %[[T1:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<16x32xi8> -> !xegpu.tensor_desc<16x32xi8>
@@ -388,17 +394,17 @@ func.func @test_binary_op_2(%arg0: !xegpu.tensor_desc<8x16xf16>, %arg1: !xegpu.t
388394

389395
// -----
390396
// CHECK: argument: <block argument> of type 'memref<8x128xf16>' at index: 0
391-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
397+
// CHECK-NEXT: sg_map : Not assigned.
392398
// CHECK-NEXT: argument: <block argument> of type 'memref<128x16xf16>' at index: 1
393-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [2, 1]
399+
// CHECK-NEXT: sg_map : Not assigned.
394400
// CHECK-NEXT: argument: <block argument> of type 'memref<8x16xf32>' at index: 2
395-
// CHECK-NEXT: sg_map : wi_layout: [1, 16], wi_data: [1, 1]
401+
// CHECK-NEXT: sg_map : Not assigned.
396402
// CHECK-NEXT: op : %{{.*}} = arith.constant 0 : index
397-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
403+
// CHECK-NEXT: sg_map for result #0: Not assigned.
398404
// CHECK-NEXT: op : %{{.*}} = arith.constant 128 : index
399405
// CHECK-NEXT: sg_map for result #0: Not assigned.
400406
// CHECK-NEXT: op : %{{.*}} = arith.constant 16 : index
401-
// CHECK-NEXT: sg_map for result #0: wi_layout: [16], wi_data: [1]
407+
// CHECK-NEXT: sg_map for result #0: Not assigned.
402408
// CHECK-NEXT: op : %[[T0:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<8x128xf16> -> !xegpu.tensor_desc<8x16xf16>
403409
// CHECK-NEXT: sg_map for result #0: wi_layout: [1, 16], wi_data: [1, 1]
404410
// CHECK-NEXT: op : %[[T1:.*]] = xegpu.create_nd_tdesc %{{.*}} : memref<128x16xf16> -> !xegpu.tensor_desc<16x16xf16>

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