[CodeGen] Construct SmallVector with iterator ranges (NFC) (#136258)

Author: kazutakahirata

llvm/lib/CodeGen/CodeGenPrepare.cpp

@@ -834,9 +834,8 @@ bool CodeGenPrepare::eliminateFallThrough(Function &F, DominatorTree *DT) {
   // Scan all of the blocks in the function, except for the entry block.
   // Use a temporary array to avoid iterator being invalidated when
   // deleting blocks.
-  SmallVector<WeakTrackingVH, 16> Blocks;
-  for (auto &Block : llvm::drop_begin(F))
-    Blocks.push_back(&Block);
+  SmallVector<WeakTrackingVH, 16> Blocks(
+      llvm::make_pointer_range(llvm::drop_begin(F)));
 
   SmallSet<WeakTrackingVH, 16> Preds;
   for (auto &Block : Blocks) {

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

@@ -867,9 +867,8 @@ void CombinerHelper::applyCombineExtendingLoads(
 
   // Rewrite all the uses to fix up the types.
   auto &LoadValue = MI.getOperand(0);
-  SmallVector<MachineOperand *, 4> Uses;
-  for (auto &UseMO : MRI.use_operands(LoadValue.getReg()))
-    Uses.push_back(&UseMO);
+  SmallVector<MachineOperand *, 4> Uses(
+      llvm::make_pointer_range(MRI.use_operands(LoadValue.getReg())));
 
   for (auto *UseMO : Uses) {
     MachineInstr *UseMI = UseMO->getParent();

llvm/lib/CodeGen/MachineInstr.cpp

@@ -2442,9 +2442,8 @@ static const DIExpression *computeExprForSpill(
 static const DIExpression *computeExprForSpill(const MachineInstr &MI,
                                                Register SpillReg) {
   assert(MI.hasDebugOperandForReg(SpillReg) && "Spill Reg is not used in MI.");
-  SmallVector<const MachineOperand *> SpillOperands;
-  for (const MachineOperand &Op : MI.getDebugOperandsForReg(SpillReg))
-    SpillOperands.push_back(&Op);
+  SmallVector<const MachineOperand *> SpillOperands(
+      llvm::make_pointer_range(MI.getDebugOperandsForReg(SpillReg)));
   return computeExprForSpill(MI, SpillOperands);
 }
 

llvm/lib/CodeGen/RegAllocFast.cpp

@@ -1733,9 +1733,8 @@ void RegAllocFastImpl::handleDebugValue(MachineInstr &MI) {
     // See if this virtual register has already been allocated to a physical
     // register or spilled to a stack slot.
     LiveRegMap::iterator LRI = findLiveVirtReg(Reg);
-    SmallVector<MachineOperand *> DbgOps;
-    for (MachineOperand &Op : MI.getDebugOperandsForReg(Reg))
-      DbgOps.push_back(&Op);
+    SmallVector<MachineOperand *> DbgOps(
+        llvm::make_pointer_range(MI.getDebugOperandsForReg(Reg)));
 
     if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {
       // Update every use of Reg within MI.

llvm/lib/CodeGen/RegisterUsageInfo.cpp

@@ -72,11 +72,9 @@ PhysicalRegisterUsageInfo::getRegUsageInfo(const Function &FP) {
 void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {
   using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
 
-  SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;
-
   // Create a vector of pointer to RegMasks entries
-  for (const auto &RegMask : RegMasks)
-    FPRMPairVector.push_back(&RegMask);
+  SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector(
+      llvm::make_pointer_range(RegMasks));
 
   // sort the vector to print analysis in alphabatic order of function name.
   llvm::sort(