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Ryan Buchnerbababuck
Ryan Buchner
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[InstCombine] Optimize (select %x, op(%x), 0) to op(%x) for operations where op(0) == 0
Have to freeze the any other operands to prevent poisons from leaking. Re-uses flow from `mul` specific version of this within the InstCombie pass.
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4 files changed

+65
-58
lines changed

4 files changed

+65
-58
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp‎

Lines changed: 29 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -878,7 +878,11 @@ static Instruction *foldSetClearBits(SelectInst &Sel,
878878
// is a vector consisting of 0 and undefs. If a constant compared with x
879879
// is a scalar undefined value or undefined vector then an expression
880880
// should be already folded into a constant.
881-
static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
881+
//
882+
// This also holds all operations such that Op(0) == 0
883+
// e.g. Shl, Umin, etc
884+
static Instruction *foldSelectZeroOrFixedOp(SelectInst &SI,
885+
InstCombinerImpl &IC) {
882886
auto *CondVal = SI.getCondition();
883887
auto *TrueVal = SI.getTrueValue();
884888
auto *FalseVal = SI.getFalseValue();
@@ -900,9 +904,7 @@ static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
900904
// non-zero elements that are masked by undef elements in the compare
901905
// constant.
902906
auto *TrueValC = dyn_cast<Constant>(TrueVal);
903-
if (TrueValC == nullptr ||
904-
!match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
905-
!isa<Instruction>(FalseVal))
907+
if (TrueValC == nullptr || !isa<Instruction>(FalseVal))
906908
return nullptr;
907909

908910
auto *ZeroC = cast<Constant>(cast<Instruction>(CondVal)->getOperand(1));
@@ -913,11 +915,28 @@ static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
913915
if (!match(MergedC, m_Zero()) && !match(MergedC, m_Undef()))
914916
return nullptr;
915917

916-
auto *FalseValI = cast<Instruction>(FalseVal);
917-
auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
918-
FalseValI->getIterator());
919-
IC.replaceOperand(*FalseValI, FalseValI->getOperand(0) == Y ? 0 : 1, FrY);
920-
return IC.replaceInstUsesWith(SI, FalseValI);
918+
if (match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
919+
match(FalseVal, m_c_And(m_Specific(X), m_Value(Y))) ||
920+
match(FalseVal, m_Shl(m_Specific(X), m_Value(Y))) ||
921+
match(FalseVal, m_AShr(m_Specific(X), m_Value(Y))) ||
922+
match(FalseVal, m_LShr(m_Specific(X), m_Value(Y))) ||
923+
match(FalseVal, m_FShl(m_Specific(X), m_Specific(X), m_Value(Y))) ||
924+
match(FalseVal, m_FShr(m_Specific(X), m_Specific(X), m_Value(Y))) ||
925+
match(FalseVal, m_SDiv(m_Specific(X), m_Value(Y))) ||
926+
match(FalseVal, m_UDiv(m_Specific(X), m_Value(Y))) ||
927+
match(FalseVal, m_c_UMin(m_Specific(X), m_Value(Y)))) {
928+
auto *FalseValI = cast<Instruction>(FalseVal);
929+
auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
930+
FalseValI->getIterator());
931+
IC.replaceOperand(*FalseValI,
932+
FalseValI->getOperand(0) == Y
933+
? 0
934+
: (FalseValI->getOperand(1) == Y ? 1 : 2),
935+
FrY);
936+
return IC.replaceInstUsesWith(SI, FalseValI);
937+
}
938+
939+
return nullptr;
921940
}
922941

923942
/// Transform patterns such as (a > b) ? a - b : 0 into usub.sat(a, b).
@@ -4104,7 +4123,7 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
41044123
return Add;
41054124
if (Instruction *Or = foldSetClearBits(SI, Builder))
41064125
return Or;
4107-
if (Instruction *Mul = foldSelectZeroOrMul(SI, *this))
4126+
if (Instruction *Mul = foldSelectZeroOrFixedOp(SI, *this))
41084127
return Mul;
41094128

41104129
// Turn (select C, (op X, Y), (op X, Z)) -> (op X, (select C, Y, Z))

‎llvm/test/Transforms/InstCombine/icmp-select.ll‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -248,10 +248,9 @@ define i1 @icmp_select_implied_cond_relational_off_by_one(i8 %x, i8 %y) {
248248

249249
define i1 @umin_seq_comparison(i8 %x, i8 %y) {
250250
; CHECK-LABEL: @umin_seq_comparison(
251-
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
252-
; CHECK-NEXT: [[CMP21:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]
253-
; CHECK-NEXT: [[CMP2:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP21]]
254-
; CHECK-NEXT: ret i1 [[CMP2]]
251+
; CHECK-NEXT: [[Y:%.*]] = freeze i8 [[Y1:%.*]]
252+
; CHECK-NEXT: [[CMP21:%.*]] = icmp ule i8 [[X:%.*]], [[Y]]
253+
; CHECK-NEXT: ret i1 [[CMP21]]
255254
;
256255
%min = call i8 @llvm.umin.i8(i8 %x, i8 %y)
257256
%cmp1 = icmp eq i8 %x, 0

‎llvm/test/Transforms/InstCombine/select-fixed-zero.ll‎

Lines changed: 27 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -4,10 +4,9 @@
44
; (select (icmp x, 0, eq), 0, (umin x, y)) -> (umin x, y)
55
define i64 @umin_select(i64 %a, i64 %b) {
66
; CHECK-LABEL: @umin_select(
7-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
8-
; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[A]], i64 [[B_FR:%.*]])
9-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[UMIN]]
10-
; CHECK-NEXT: ret i64 [[SELECT]]
7+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
8+
; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[A:%.*]], i64 [[B_FR]])
9+
; CHECK-NEXT: ret i64 [[UMIN]]
1110
;
1211
%cond = icmp eq i64 %a, 0
1312
%umin = call i64 @llvm.umin.i64(i64 %a, i64 %b)
@@ -31,10 +30,9 @@ define i64 @mul_select(i64 %a, i64 %b) {
3130
; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y)
3231
define i64 @shl_select(i64 %a, i64 %b) {
3332
; CHECK-LABEL: @shl_select(
34-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
35-
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A]], [[B_FR:%.*]]
36-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[SHL]]
37-
; CHECK-NEXT: ret i64 [[SELECT]]
33+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
34+
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A:%.*]], [[B_FR]]
35+
; CHECK-NEXT: ret i64 [[SHL]]
3836
;
3937
%cond = icmp eq i64 %a, 0
4038
%shl = shl i64 %a, %b
@@ -45,10 +43,9 @@ define i64 @shl_select(i64 %a, i64 %b) {
4543
; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y)
4644
define i64 @and_select(i64 %a, i64 %b) {
4745
; CHECK-LABEL: @and_select(
48-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
49-
; CHECK-NEXT: [[AND:%.*]] = and i64 [[A]], [[B_FR:%.*]]
50-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[AND]]
51-
; CHECK-NEXT: ret i64 [[SELECT]]
46+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
47+
; CHECK-NEXT: [[AND:%.*]] = and i64 [[A:%.*]], [[B_FR]]
48+
; CHECK-NEXT: ret i64 [[AND]]
5249
;
5350
%cond = icmp eq i64 %a, 0
5451
%and = and i64 %a, %b
@@ -59,10 +56,9 @@ define i64 @and_select(i64 %a, i64 %b) {
5956
; (select (icmp x, 0, ne), (ashr x, y), 0) -> (ashr x, y)
6057
define i64 @ashr_select(i64 %a, i64 %b) {
6158
; CHECK-LABEL: @ashr_select(
62-
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0
63-
; CHECK-NEXT: [[ASHR:%.*]] = ashr i64 [[A]], [[B_FR:%.*]]
64-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[ASHR]]
65-
; CHECK-NEXT: ret i64 [[SELECT]]
59+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
60+
; CHECK-NEXT: [[ASHR:%.*]] = ashr i64 [[A:%.*]], [[B_FR]]
61+
; CHECK-NEXT: ret i64 [[ASHR]]
6662
;
6763
%cond = icmp ne i64 0, %a
6864
%ashr = ashr i64 %a, %b
@@ -73,10 +69,9 @@ define i64 @ashr_select(i64 %a, i64 %b) {
7369
; (select (icmp x, 0, ne), (lshr x, y), 0) -> (lshr x, y)
7470
define i64 @lshr_select(i64 %a, i64 %b) {
7571
; CHECK-LABEL: @lshr_select(
76-
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp eq i64 [[A:%.*]], 0
77-
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[A]], [[B_FR:%.*]]
78-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND_NOT]], i64 0, i64 [[LSHR]]
79-
; CHECK-NEXT: ret i64 [[SELECT]]
72+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
73+
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[A:%.*]], [[B_FR]]
74+
; CHECK-NEXT: ret i64 [[LSHR]]
8075
;
8176
%cond = icmp ne i64 0, %a
8277
%lshr = lshr i64 %a, %b
@@ -87,10 +82,9 @@ define i64 @lshr_select(i64 %a, i64 %b) {
8782
; (select (icmp x, 0, eq), 0, fshr(x, x, y)) -> fshr(x, x, y)
8883
define i64 @fshr_select(i64 %a, i64 %b) {
8984
; CHECK-LABEL: @fshr_select(
90-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
91-
; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A]], i64 [[A]], i64 [[B_FR:%.*]])
92-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[FSHR]]
93-
; CHECK-NEXT: ret i64 [[SELECT]]
85+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
86+
; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
87+
; CHECK-NEXT: ret i64 [[FSHR]]
9488
;
9589
%cond = icmp eq i64 %a, 0
9690
%fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 %b)
@@ -101,10 +95,9 @@ define i64 @fshr_select(i64 %a, i64 %b) {
10195
; (select (icmp x, 0, eq), 0, (fshl x, x, y)) -> (fshl x, x, y)
10296
define i64 @fshl_select(i64 %a, i64 %b) {
10397
; CHECK-LABEL: @fshl_select(
104-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
105-
; CHECK-NEXT: [[FSHL:%.*]] = call i64 @llvm.fshl.i64(i64 [[A]], i64 [[A]], i64 [[B_FR:%.*]])
106-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[FSHL]]
107-
; CHECK-NEXT: ret i64 [[SELECT]]
98+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
99+
; CHECK-NEXT: [[FSHL:%.*]] = call i64 @llvm.fshl.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
100+
; CHECK-NEXT: ret i64 [[FSHL]]
108101
;
109102
%cond = icmp eq i64 %a, 0
110103
%fshl = call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 %b)
@@ -129,10 +122,9 @@ define i64 @fshr_select_no_combine(i64 %a, i64 %b, i64 %c) {
129122
; (select (icmp x, 0, eq), 0, (sdiv x, y)) -> (sdiv x, y)
130123
define i64 @sdiv_select(i64 %a, i64 %b) {
131124
; CHECK-LABEL: @sdiv_select(
132-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
133-
; CHECK-NEXT: [[DIV:%.*]] = sdiv i64 [[A]], [[B_FR:%.*]]
134-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[DIV]]
135-
; CHECK-NEXT: ret i64 [[SELECT]]
125+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
126+
; CHECK-NEXT: [[DIV:%.*]] = sdiv i64 [[A:%.*]], [[B_FR]]
127+
; CHECK-NEXT: ret i64 [[DIV]]
136128
;
137129
%cond = icmp eq i64 %a, 0
138130
%div = sdiv i64 %a, %b
@@ -143,10 +135,9 @@ define i64 @sdiv_select(i64 %a, i64 %b) {
143135
; (select (icmp x, 0, eq), 0, (udiv x, y)) -> (udiv x, y)
144136
define i64 @udiv_select(i64 %a, i64 %b) {
145137
; CHECK-LABEL: @udiv_select(
146-
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
147-
; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A]], [[B_FR:%.*]]
148-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[DIV]]
149-
; CHECK-NEXT: ret i64 [[SELECT]]
138+
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
139+
; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B_FR]]
140+
; CHECK-NEXT: ret i64 [[DIV]]
150141
;
151142
%cond = icmp eq i64 %a, 0
152143
%div = udiv i64 %a, %b

‎llvm/test/Transforms/InstCombine/select.ll‎

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -893,10 +893,9 @@ define i32 @test56(i16 %x) {
893893

894894
define i32 @test57(i32 %x, i32 %y) {
895895
; CHECK-LABEL: @test57(
896-
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
897-
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[X]], 0
898-
; CHECK-NEXT: [[DOTAND:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[AND]]
899-
; CHECK-NEXT: ret i32 [[DOTAND]]
896+
; CHECK-NEXT: [[Y:%.*]] = freeze i32 [[Y1:%.*]]
897+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
898+
; CHECK-NEXT: ret i32 [[AND]]
900899
;
901900
%and = and i32 %x, %y
902901
%tobool = icmp eq i32 %x, 0
@@ -2734,10 +2733,9 @@ define void @select_freeze_icmp_multuses(i32 %x, i32 %y) {
27342733

27352734
define i32 @pr47322_more_poisonous_replacement(i32 %arg) {
27362735
; CHECK-LABEL: @pr47322_more_poisonous_replacement(
2737-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARG:%.*]], 0
2738-
; CHECK-NEXT: [[TRAILING:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG]], i1 true)
2739-
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr exact i32 [[ARG]], [[TRAILING]]
2740-
; CHECK-NEXT: [[R1_SROA_0_1:%.*]] = select i1 [[CMP]], i32 0, i32 [[SHIFTED]]
2736+
; CHECK-NEXT: [[TRAILING:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG:%.*]], i1 true)
2737+
; CHECK-NEXT: [[TRAILING_FR:%.*]] = freeze i32 [[TRAILING]]
2738+
; CHECK-NEXT: [[R1_SROA_0_1:%.*]] = lshr exact i32 [[ARG]], [[TRAILING_FR]]
27412739
; CHECK-NEXT: ret i32 [[R1_SROA_0_1]]
27422740
;
27432741
%cmp = icmp eq i32 %arg, 0

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