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[VPlan] Materialize VF and VFxUF using VPInstructions.
 Materialize VF and VFxUF computation using VPInstruction instead of directly creating IR. This is one of the last few steps needed to model the full vector skeleton in VPlan. This is mostly NFC, although in some cases we remove some unused computations.
1 parent d9199a8 commit 59322c5

20 files changed

+99
-87
lines changed

‎llvm/lib/Transforms/Vectorize/LoopVectorize.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7304,6 +7304,7 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan(
73047304
VPlanTransforms::materializeVectorTripCount(
73057305
BestVPlan, VectorPH, CM.foldTailByMasking(),
73067306
CM.requiresScalarEpilogue(BestVF.isVector()));
7307+
VPlanTransforms::materializeVFAndVFxUF(BestVPlan, VectorPH, BestVF);
73077308

73087309
// Perform the actual loop transformation.
73097310
VPTransformState State(&TTI, BestVF, LI, DT, ILV.AC, ILV.Builder, &BestVPlan,
@@ -7360,7 +7361,6 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan(
73607361
//===------------------------------------------------===//
73617362

73627363
// 2. Copy and widen instructions from the old loop into the new loop.
7363-
BestVPlan.prepareToExecute(State);
73647364
replaceVPBBWithIRVPBB(VectorPH, State.CFG.PrevBB);
73657365

73667366
// Move check blocks to their final position.

‎llvm/lib/Transforms/Vectorize/VPlan.cpp‎

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -951,22 +951,6 @@ VPlan::~VPlan() {
951951
delete BackedgeTakenCount;
952952
}
953953

954-
void VPlan::prepareToExecute(VPTransformState &State) {
955-
IRBuilder<> Builder(State.CFG.PrevBB->getTerminator());
956-
Type *TCTy = VPTypeAnalysis(*this).inferScalarType(getTripCount());
957-
// FIXME: Model VF * UF computation completely in VPlan.
958-
unsigned UF = getUF();
959-
if (VF.getNumUsers()) {
960-
Value *RuntimeVF = getRuntimeVF(Builder, TCTy, State.VF);
961-
VF.setUnderlyingValue(RuntimeVF);
962-
VFxUF.setUnderlyingValue(
963-
UF > 1 ? Builder.CreateMul(RuntimeVF, ConstantInt::get(TCTy, UF))
964-
: RuntimeVF);
965-
} else {
966-
VFxUF.setUnderlyingValue(createStepForVF(Builder, TCTy, State.VF, UF));
967-
}
968-
}
969-
970954
VPIRBasicBlock *VPlan::getExitBlock(BasicBlock *IRBB) const {
971955
auto Iter = find_if(getExitBlocks(), [IRBB](const VPIRBasicBlock *VPIRBB) {
972956
return VPIRBB->getIRBasicBlock() == IRBB;

‎llvm/lib/Transforms/Vectorize/VPlan.h‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1019,6 +1019,7 @@ class LLVM_ABI_FOR_TEST VPInstruction : public VPRecipeWithIRFlags,
10191019
/// The lane specifies an index into a vector formed by combining all vector
10201020
/// operands (all operands after the first one).
10211021
ExtractLane,
1022+
VScale,
10221023

10231024
};
10241025

@@ -1167,6 +1168,7 @@ class VPInstructionWithType : public VPInstruction {
11671168
switch (VPI->getOpcode()) {
11681169
case VPInstruction::WideIVStep:
11691170
case VPInstruction::StepVector:
1171+
case VPInstruction::VScale:
11701172
return true;
11711173
default:
11721174
return false;
@@ -3968,9 +3970,6 @@ class VPlan {
39683970
VPBB->setPlan(this);
39693971
}
39703972

3971-
/// Prepare the plan for execution, setting up the required live-in values.
3972-
void prepareToExecute(VPTransformState &State);
3973-
39743973
/// Generate the IR code for this VPlan.
39753974
void execute(VPTransformState *State);
39763975

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -452,6 +452,7 @@ unsigned VPInstruction::getNumOperandsForOpcode(unsigned Opcode) {
452452

453453
switch (Opcode) {
454454
case VPInstruction::StepVector:
455+
case VPInstruction::VScale:
455456
return 0;
456457
case Instruction::Alloca:
457458
case Instruction::ExtractValue:
@@ -1027,6 +1028,7 @@ bool VPInstruction::isSingleScalar() const {
10271028
switch (getOpcode()) {
10281029
case Instruction::PHI:
10291030
case VPInstruction::ExplicitVectorLength:
1031+
case VPInstruction::VScale:
10301032
return true;
10311033
default:
10321034
return isScalarCast();
@@ -1281,6 +1283,12 @@ void VPInstructionWithType::execute(VPTransformState &State) {
12811283
State.set(this, StepVector);
12821284
break;
12831285
}
1286+
case VPInstruction::VScale: {
1287+
Value *VScale = State.Builder.CreateVScale(ResultTy);
1288+
State.set(this, VScale, true);
1289+
break;
1290+
}
1291+
12841292
default:
12851293
llvm_unreachable("opcode not implemented yet");
12861294
}
@@ -1301,6 +1309,9 @@ void VPInstructionWithType::print(raw_ostream &O, const Twine &Indent,
13011309
case VPInstruction::StepVector:
13021310
O << "step-vector " << *ResultTy;
13031311
break;
1312+
case VPInstruction::VScale:
1313+
O << "vscale " << *ResultTy;
1314+
break;
13041315
default:
13051316
assert(Instruction::isCast(getOpcode()) && "unhandled opcode");
13061317
O << Instruction::getOpcodeName(getOpcode()) << " ";

‎llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp‎

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3339,6 +3339,50 @@ void VPlanTransforms::materializeVectorTripCount(VPlan &Plan,
33393339
VectorTC.replaceAllUsesWith(Res);
33403340
}
33413341

3342+
void VPlanTransforms::materializeVFAndVFxUF(VPlan &Plan, VPBasicBlock *VectorPH,
3343+
ElementCount VFEC) {
3344+
VPBuilder Builder(VectorPH, VectorPH->begin());
3345+
auto *TCTy = VPTypeAnalysis(Plan).inferScalarType(Plan.getTripCount());
3346+
VPValue &VF = Plan.getVF();
3347+
VPValue &VFxUF = Plan.getVFxUF();
3348+
if (VF.getNumUsers()) {
3349+
VPValue *RuntimeVF =
3350+
Plan.getOrAddLiveIn(ConstantInt::get(TCTy, VFEC.getKnownMinValue()));
3351+
if (VFEC.isScalable())
3352+
RuntimeVF = Builder.createNaryOp(
3353+
Instruction::Mul,
3354+
{Builder.createNaryOp(VPInstruction::VScale, {}, TCTy), RuntimeVF},
3355+
VPIRFlags::WrapFlagsTy(true, false));
3356+
if (any_of(VF.users(), [&VF](VPUser *U) { return !U->usesScalars(&VF); })) {
3357+
auto *BC = Builder.createNaryOp(VPInstruction::Broadcast, {RuntimeVF});
3358+
VF.replaceUsesWithIf(
3359+
BC, [&VF](VPUser &U, unsigned) { return !U.usesScalars(&VF); });
3360+
}
3361+
VF.replaceAllUsesWith(RuntimeVF);
3362+
3363+
VPValue *UF = Plan.getOrAddLiveIn(ConstantInt::get(TCTy, Plan.getUF()));
3364+
auto *MulByUF = Plan.getUF() == 1 ? RuntimeVF
3365+
: Builder.createNaryOp(Instruction::Mul,
3366+
{RuntimeVF, UF});
3367+
VFxUF.replaceAllUsesWith(MulByUF);
3368+
return;
3369+
}
3370+
3371+
unsigned VFMulUF = VFEC.getKnownMinValue() * Plan.getUF();
3372+
VPValue *RuntimeVFxUF = Plan.getOrAddLiveIn(ConstantInt::get(TCTy, VFMulUF));
3373+
if (VFEC.isScalable()) {
3374+
RuntimeVFxUF =
3375+
VFMulUF == 1
3376+
? RuntimeVFxUF
3377+
: Builder.createNaryOp(
3378+
Instruction::Mul,
3379+
{Builder.createNaryOp(VPInstruction::VScale, {}, TCTy),
3380+
RuntimeVFxUF},
3381+
VPIRFlags::WrapFlagsTy(true, false));
3382+
}
3383+
VFxUF.replaceAllUsesWith(RuntimeVFxUF);
3384+
}
3385+
33423386
/// Returns true if \p V is VPWidenLoadRecipe or VPInterleaveRecipe that can be
33433387
/// converted to a narrower recipe. \p V is used by a wide recipe that feeds a
33443388
/// store interleave group at index \p Idx, \p WideMember0 is the recipe feeding

‎llvm/lib/Transforms/Vectorize/VPlanTransforms.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -276,6 +276,10 @@ struct VPlanTransforms {
276276
static void materializeBackedgeTakenCount(VPlan &Plan,
277277
VPBasicBlock *VectorPH);
278278

279+
/// Materialize VF and VFxUF to be computed explicitly using VPInstructions.
280+
static void materializeVFAndVFxUF(VPlan &Plan, VPBasicBlock *VectorPH,
281+
ElementCount VF);
282+
279283
/// Try to convert a plan with interleave groups with VF elements to a plan
280284
/// with the interleave groups replaced by wide loads and stores processing VF
281285
/// elements, if all transformed interleave groups access the full vector

‎llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -14,12 +14,12 @@ define void @induction_i7(ptr %dst) #0 {
1414
; CHECK: vector.ph:
1515
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
1616
; CHECK-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP4]], 2
17+
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP40]], i64 0
18+
; CHECK-NEXT: [[DOTSPLAT_:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1719
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP40]], 2
1820
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 64, [[TMP5]]
1921
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 64, [[N_MOD_VF]]
2022
; CHECK-NEXT: [[IND_END:%.*]] = trunc i64 [[N_VEC]] to i7
21-
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP40]], i64 0
22-
; CHECK-NEXT: [[DOTSPLAT_:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
2323
; CHECK-NEXT: [[DOTSPLAT:%.*]] = trunc <vscale x 2 x i64> [[DOTSPLAT_]] to <vscale x 2 x i7>
2424
; CHECK-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i8> @llvm.stepvector.nxv2i8()
2525
; CHECK-NEXT: [[TMP7:%.*]] = trunc <vscale x 2 x i8> [[TMP6]] to <vscale x 2 x i7>
@@ -76,12 +76,12 @@ define void @induction_i3_zext(ptr %dst) #0 {
7676
; CHECK: vector.ph:
7777
; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
7878
; CHECK-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP4]], 2
79+
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP40]], i64 0
80+
; CHECK-NEXT: [[DOTSPLAT_:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
7981
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP40]], 2
8082
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 64, [[TMP5]]
8183
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 64, [[N_MOD_VF]]
8284
; CHECK-NEXT: [[IND_END:%.*]] = trunc i64 [[N_VEC]] to i3
83-
; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[TMP40]], i64 0
84-
; CHECK-NEXT: [[DOTSPLAT_:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
8585
; CHECK-NEXT: [[DOTSPLAT:%.*]] = trunc <vscale x 2 x i64> [[DOTSPLAT_]] to <vscale x 2 x i3>
8686
; CHECK-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i8> @llvm.stepvector.nxv2i8()
8787
; CHECK-NEXT: [[TMP7:%.*]] = trunc <vscale x 2 x i8> [[TMP6]] to <vscale x 2 x i3>

‎llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,6 @@ define i32 @print_partial_reduction(ptr %a, ptr %b) {
7272
; CHECK-NEXT: No successors
7373
; CHECK-NEXT: }
7474
; CHECK: VPlan 'Final VPlan for VF={8,16},UF={1}' {
75-
; CHECK-NEXT: Live-in ir<[[EP_VFxUF:.+]]> = VF * UF
7675
; CHECK-NEXT: Live-in ir<1024> = original trip-count
7776
; CHECK-EMPTY:
7877
; CHECK-NEXT: ir-bb<entry>:

‎llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll‎

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,6 @@ define i64 @pr97452_scalable_vf1_for(ptr %src, ptr noalias %dst) #0 {
1212
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 23, [[TMP0]]
1313
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
1414
; CHECK: [[VECTOR_PH]]:
15-
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
16-
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 23, [[TMP1]]
17-
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 23, [[N_MOD_VF]]
1815
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vscale.i32()
1916
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP3]], 1
2017
; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <vscale x 1 x i64> poison, i64 0, i32 [[TMP4]]
@@ -27,21 +24,20 @@ define i64 @pr97452_scalable_vf1_for(ptr %src, ptr noalias %dst) #0 {
2724
; CHECK-NEXT: [[TMP7:%.*]] = call <vscale x 1 x i64> @llvm.vector.splice.nxv1i64(<vscale x 1 x i64> [[VECTOR_RECUR]], <vscale x 1 x i64> [[WIDE_LOAD]], i32 -1)
2825
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i64, ptr [[DST]], i64 [[INDEX]]
2926
; CHECK-NEXT: store <vscale x 1 x i64> [[TMP7]], ptr [[TMP8]], align 8
30-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP1]]
31-
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
32-
; CHECK-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
27+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 1
28+
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 23
29+
; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
3330
; CHECK: [[MIDDLE_BLOCK]]:
3431
; CHECK-NEXT: [[TMP11:%.*]] = call i32 @llvm.vscale.i32()
3532
; CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[TMP11]], 1
3633
; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <vscale x 1 x i64> [[WIDE_LOAD]], i32 [[TMP12]]
3734
; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vscale.i32()
3835
; CHECK-NEXT: [[TMP15:%.*]] = sub i32 [[TMP14]], 1
3936
; CHECK-NEXT: [[TMP16:%.*]] = extractelement <vscale x 1 x i64> [[TMP7]], i32 [[TMP15]]
40-
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 23, [[N_VEC]]
41-
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
37+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[SCALAR_PH]]
4238
; CHECK: [[SCALAR_PH]]:
4339
; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i64 [ [[VECTOR_RECUR_EXTRACT]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
44-
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
40+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 23, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
4541
; CHECK-NEXT: br label %[[LOOP:.*]]
4642
; CHECK: [[LOOP]]:
4743
; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ [[SCALAR_RECUR_INIT]], %[[SCALAR_PH]] ], [ [[L:%.*]], %[[LOOP]] ]

‎llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1012,7 +1012,6 @@ define void @load_store_factor5(ptr %p) {
10121012
; CHECK-NEXT: entry:
10131013
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
10141014
; CHECK: vector.ph:
1015-
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
10161015
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
10171016
; CHECK: vector.body:
10181017
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1155,7 +1154,6 @@ define void @load_store_factor5(ptr %p) {
11551154
; SCALABLE-NEXT: entry:
11561155
; SCALABLE-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
11571156
; SCALABLE: vector.ph:
1158-
; SCALABLE-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
11591157
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
11601158
; SCALABLE: vector.body:
11611159
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1273,7 +1271,6 @@ define void @load_store_factor6(ptr %p) {
12731271
; CHECK-NEXT: entry:
12741272
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
12751273
; CHECK: vector.ph:
1276-
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
12771274
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
12781275
; CHECK: vector.body:
12791276
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1431,7 +1428,6 @@ define void @load_store_factor6(ptr %p) {
14311428
; SCALABLE-NEXT: entry:
14321429
; SCALABLE-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
14331430
; SCALABLE: vector.ph:
1434-
; SCALABLE-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
14351431
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
14361432
; SCALABLE: vector.body:
14371433
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1562,7 +1558,6 @@ define void @load_store_factor7(ptr %p) {
15621558
; CHECK-NEXT: entry:
15631559
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
15641560
; CHECK: vector.ph:
1565-
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
15661561
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
15671562
; CHECK: vector.body:
15681563
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1736,7 +1731,6 @@ define void @load_store_factor7(ptr %p) {
17361731
; SCALABLE-NEXT: entry:
17371732
; SCALABLE-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
17381733
; SCALABLE: vector.ph:
1739-
; SCALABLE-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
17401734
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
17411735
; SCALABLE: vector.body:
17421736
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -1880,7 +1874,6 @@ define void @load_store_factor8(ptr %p) {
18801874
; CHECK-NEXT: entry:
18811875
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
18821876
; CHECK: vector.ph:
1883-
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
18841877
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
18851878
; CHECK: vector.body:
18861879
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
@@ -2067,7 +2060,6 @@ define void @load_store_factor8(ptr %p) {
20672060
; SCALABLE-NEXT: entry:
20682061
; SCALABLE-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
20692062
; SCALABLE: vector.ph:
2070-
; SCALABLE-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
20712063
; SCALABLE-NEXT: br label [[VECTOR_BODY:%.*]]
20722064
; SCALABLE: vector.body:
20732065
; SCALABLE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]

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