Skip to content

Commit 59dfc5d

Browse files
committed
fixup! [AMDGPU][AsmParser] Support true16 register suffix for valid register range
1 parent cc0d0d0 commit 59dfc5d

File tree

2 files changed

+8
-12
lines changed

2 files changed

+8
-12
lines changed

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2896,17 +2896,13 @@ bool AMDGPUAsmParser::ParseRegRange(unsigned &Num, unsigned &RegWidth,
28962896
}
28972897

28982898
if (RegHi == RegLo) {
2899-
StringRef RegSuffix;
2900-
SMLoc RegSuffixLoc = getLoc();
2901-
if (parseId(RegSuffix)) {
2902-
if (RegSuffix.consume_back(".l")) {
2903-
SubReg = AMDGPU::lo16;
2904-
} else if (RegSuffix.consume_back(".h")) {
2905-
SubReg = AMDGPU::hi16;
2906-
} else {
2907-
Error(RegSuffixLoc, "invalid register suffix");
2908-
return false;
2909-
}
2899+
StringRef RegSuffix = getTokenStr();
2900+
if (RegSuffix == ".l") {
2901+
SubReg = AMDGPU::lo16;
2902+
lex();
2903+
} else if (RegSuffix == ".h") {
2904+
SubReg = AMDGPU::hi16;
2905+
lex();
29102906
}
29112907
}
29122908

llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1233,7 +1233,7 @@ v_trunc_f16_e32 v5.l, v199.l quad_perm:[3,2,1,0]
12331233
// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
12341234

12351235
v_ceil_f16_e32 v[5:5].s, 0xfe0b
1236-
// GFX11: :[[@LINE-1]]:22: error: invalid register suffix
1236+
// GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
12371237

12381238
v_ceil_f16_e32 v[6:7].l, 0xfe0b
12391239
// GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction

0 commit comments

Comments
 (0)