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Signed-off-by: John Lu <[email protected]>
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llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -10623,13 +10623,13 @@ bool SIInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,
1062310623
// SCCValid. If there are no intervening SCC conflicts delete SCCRedefine and
1062410624
// update kill/dead flags if necessary.
1062510625
static bool optimizeSCC(MachineInstr *SCCValid, MachineInstr *SCCRedefine,
10626-
const SIRegisterInfo *RI) {
10626+
const SIRegisterInfo &RI) {
1062710627
MachineInstr *KillsSCC = nullptr;
1062810628
for (MachineInstr &MI : make_range(std::next(SCCValid->getIterator()),
1062910629
SCCRedefine->getIterator())) {
10630-
if (MI.modifiesRegister(AMDGPU::SCC, RI))
10630+
if (MI.modifiesRegister(AMDGPU::SCC, &RI))
1063110631
return false;
10632-
if (MI.killsRegister(AMDGPU::SCC, RI))
10632+
if (MI.killsRegister(AMDGPU::SCC, &RI))
1063310633
KillsSCC = &MI;
1063410634
}
1063510635
if (MachineOperand *SccDef =
@@ -10641,17 +10641,17 @@ static bool optimizeSCC(MachineInstr *SCCValid, MachineInstr *SCCRedefine,
1064110641
return true;
1064210642
}
1064310643

10644-
static bool foldableSelect(MachineInstr *Def) {
10645-
if (Def->getOpcode() == AMDGPU::S_CSELECT_B32 ||
10646-
Def->getOpcode() == AMDGPU::S_CSELECT_B64) {
10647-
bool Op1IsNonZeroImm =
10648-
Def->getOperand(1).isImm() && Def->getOperand(1).getImm() != 0;
10649-
bool Op2IsZeroImm =
10650-
Def->getOperand(2).isImm() && Def->getOperand(2).getImm() == 0;
10651-
if (Op1IsNonZeroImm && Op2IsZeroImm)
10652-
return true;
10653-
}
10654-
return false;
10644+
static bool foldableSelect(const MachineInstr &Def) {
10645+
if (Def.getOpcode() != AMDGPU::S_CSELECT_B32 &&
10646+
Def.getOpcode() != AMDGPU::S_CSELECT_B64)
10647+
return false;
10648+
bool Op1IsNonZeroImm =
10649+
Def.getOperand(1).isImm() && Def.getOperand(1).getImm() != 0;
10650+
bool Op2IsZeroImm =
10651+
Def.getOperand(2).isImm() && Def.getOperand(2).getImm() == 0;
10652+
if (!Op1IsNonZeroImm || !Op2IsZeroImm)
10653+
return false;
10654+
return true;
1065510655
}
1065610656

1065710657
bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
@@ -10683,10 +10683,10 @@ bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
1068310683
//
1068410684
// s_cmp_lg_* (S_CSELECT* (non-zero imm), 0), 0 => (S_CSELECT* (non-zero
1068510685
// imm), 0)
10686-
if (!setsSCCifResultIsNonZero(*Def) && !foldableSelect(Def))
10686+
if (!setsSCCifResultIsNonZero(*Def) && !foldableSelect(*Def))
1068710687
return false;
1068810688

10689-
if (!optimizeSCC(Def, &CmpInstr, &RI))
10689+
if (!optimizeSCC(Def, &CmpInstr, RI))
1069010690
return false;
1069110691

1069210692
return true;
@@ -10766,7 +10766,7 @@ bool SIInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
1076610766
if (IsReversedCC && !MRI->hasOneNonDBGUse(DefReg))
1076710767
return false;
1076810768

10769-
if (!optimizeSCC(Def, &CmpInstr, &RI))
10769+
if (!optimizeSCC(Def, &CmpInstr, RI))
1077010770
return false;
1077110771

1077210772
if (!MRI->use_nodbg_empty(DefReg)) {

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