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[NFC][AMDGPU] IGLP: Fixes for unsigned int handling
Fixes unsigned int underflows in `MFMASmallGemmSingleWaveOpt::applyIGLPStrategy`.
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llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2183,7 +2183,7 @@ bool MFMASmallGemmSingleWaveOpt::applyIGLPStrategy(
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SG->initSchedGroup(SyncedInstrs[SG->getSyncID()]);
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// Interleave MFMA with DS_READ prefetch
2186-
for (unsigned I = 0; I < DSRCount - 4; ++I) {
2186+
for (unsigned I = 4; I < DSRCount; ++I) {
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SG = &SyncedSchedGroups[PipelineSyncID].emplace_back(
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SchedGroupMask::DS_READ, 1, PipelineSyncID, DAG, TII);
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SG->initSchedGroup(SyncedInstrs[SG->getSyncID()]);
@@ -2196,7 +2196,7 @@ bool MFMASmallGemmSingleWaveOpt::applyIGLPStrategy(
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// Phase 2a: Loop carried dependency with V_PERM
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// Schedule VPerm & DS_WRITE as closely as possible to the VMEM_READ they
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// depend on. Interleave MFMA to keep XDL unit busy throughout.
2199-
for (unsigned I = 0; I < DSWWithPermCount - DSWWithSharedVMEMCount; ++I) {
2199+
for (unsigned I = DSWWithSharedVMEMCount; I < DSWWithPermCount; ++I) {
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SG = &SyncedSchedGroups[PipelineSyncID].emplace_back(
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SchedGroupMask::VALU, 4, PipelineSyncID, DAG, TII);
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SG->addRule(std::make_shared<IsPermForDSW>(TII, SG->getSGID(), true));
@@ -2233,7 +2233,7 @@ bool MFMASmallGemmSingleWaveOpt::applyIGLPStrategy(
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// Phase 2b: Loop carried dependency without V_PERM
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// Schedule DS_WRITE as closely as possible to the VMEM_READ they depend on.
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// Interleave MFMA to keep XDL unit busy throughout.
2236-
for (unsigned I = 0; I < DSWCount - DSWWithPermCount; I++) {
2236+
for (unsigned I = DSWWithPermCount; I < DSWCount; I++) {
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SG = &SyncedSchedGroups[PipelineSyncID].emplace_back(
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SchedGroupMask::DS_WRITE, 1, PipelineSyncID, DAG, TII);
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SG->initSchedGroup(SyncedInstrs[SG->getSyncID()]);

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