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joaosaffran
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update
1 parent aea75da commit 5af9199

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3 files changed

+86
-24
lines changed

3 files changed

+86
-24
lines changed

llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,11 +13,13 @@
1313
#include "llvm/ADT/SmallString.h"
1414
#include "llvm/Analysis/DXILMetadataAnalysis.h"
1515
#include "llvm/Analysis/DXILResource.h"
16+
#include "llvm/IR/DerivedTypes.h"
1617
#include "llvm/IR/DiagnosticInfo.h"
1718
#include "llvm/IR/Instructions.h"
1819
#include "llvm/IR/IntrinsicsDirectX.h"
1920
#include "llvm/IR/Module.h"
2021
#include "llvm/InitializePasses.h"
22+
#include "llvm/Support/Casting.h"
2123

2224
#define DEBUG_TYPE "dxil-post-optimization-validation"
2325

@@ -90,7 +92,11 @@ reportInvalidHandleTyBoundInRs(Module &M, Twine Type,
9092
ResourceInfo::ResourceBinding Binding) {
9193
SmallString<128> Message;
9294
raw_svector_ostream OS(Message);
95+
<<<<<<< Updated upstream
9396
OS << "register " << Type << " (space=" << Binding.Space
97+
=======
98+
OS << "resource " << Type << " at register (space=" << Binding.Space
99+
>>>>>>> Stashed changes
94100
<< ", register=" << Binding.LowerBound << ")"
95101
<< " is bound to a texture or typed buffer.";
96102
M.getContext().diagnose(DiagnosticInfoGeneric(Message));
@@ -146,6 +152,37 @@ getRootSignature(RootSignatureBindingInfo &RSBI,
146152
return RootSigDesc;
147153
}
148154

155+
<<<<<<< Updated upstream
156+
=======
157+
static void reportInvalidRegistersBinding(
158+
Module &M,
159+
const std::vector<llvm::dxil::ResourceInfo::ResourceBinding> &Bindings,
160+
iterator_range<SmallVector<dxil::ResourceInfo>::iterator> &Resources) {
161+
for (auto Res = Resources.begin(), End = Resources.end(); Res != End; Res++) {
162+
bool Bound = false;
163+
ResourceInfo::ResourceBinding ResBinding = Res->getBinding();
164+
for (const auto &Binding : Bindings) {
165+
if (ResBinding.Space == Binding.Space &&
166+
ResBinding.LowerBound >= Binding.LowerBound &&
167+
ResBinding.LowerBound < Binding.LowerBound + Binding.Size) {
168+
Bound = true;
169+
break;
170+
}
171+
}
172+
if (!Bound) {
173+
reportRegNotBound(M, Res->getName(), Res->getBinding());
174+
} else {
175+
TargetExtType *Handle = Res->getHandleTy();
176+
auto *TypedBuffer = dyn_cast_or_null<TypedBufferExtType>(Handle);
177+
auto *Texture = dyn_cast_or_null<TextureExtType>(Handle);
178+
179+
if (TypedBuffer != nullptr || Texture != nullptr)
180+
reportInvalidHandleTyBoundInRs(M, Res->getName(), Res->getBinding());
181+
}
182+
}
183+
}
184+
185+
>>>>>>> Stashed changes
149186
static void reportErrors(Module &M, DXILResourceMap &DRM,
150187
DXILResourceBindingInfo &DRBI,
151188
RootSignatureBindingInfo &RSBI,
@@ -170,6 +207,7 @@ static void reportErrors(Module &M, DXILResourceMap &DRM,
170207
reportRegNotBound(M, "cbuffer", Binding);
171208
}
172209

210+
<<<<<<< Updated upstream
173211
for (const ResourceInfo &SRV : DRM.srvs()) {
174212
ResourceInfo::ResourceBinding Binding = SRV.getBinding();
175213
if (!Validation.checkTRegBinding(Binding))
@@ -201,6 +239,17 @@ static void reportErrors(Module &M, DXILResourceMap &DRM,
201239
if (!Validation.checkSamplerBinding(Binding))
202240
reportRegNotBound(M, "sampler", Binding);
203241
}
242+
=======
243+
reportInvalidRegistersBinding(
244+
M, Validation.getBindingsOfType(dxbc::DescriptorRangeType::CBV), Cbufs);
245+
reportInvalidRegistersBinding(
246+
M, Validation.getBindingsOfType(dxbc::DescriptorRangeType::UAV), UAVs);
247+
reportInvalidRegistersBinding(
248+
M, Validation.getBindingsOfType(dxbc::DescriptorRangeType::Sampler),
249+
Samplers);
250+
reportInvalidRegistersBinding(
251+
M, Validation.getBindingsOfType(dxbc::DescriptorRangeType::SRV), SRVs);
252+
>>>>>>> Stashed changes
204253
}
205254
}
206255
} // namespace
Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
; RUN: not opt -S -passes='dxil-post-optimization-validation' -mtriple=dxil-pc-shadermodel6.6-compute %s 2>&1 | FileCheck %s
2+
; CHECK: error: resource TB at register (space=0, register=0) is bound to a texture or typed buffer.
3+
4+
5+
; Root Signature(
6+
; CBV(b3, space=1, visibility=SHADER_VISIBILITY_ALL)
7+
; DescriptorTable(SRV(t0, space=0, numDescriptors=1), visibility=SHADER_VISIBILITY_ALL)
8+
; DescriptorTable(Sampler(s0, numDescriptors=2), visibility=SHADER_VISIBILITY_VERTEX)
9+
; DescriptorTable(UAV(u0, numDescriptors=unbounded), visibility=SHADER_VISIBILITY_ALL)
10+
11+
@TB.str = private unnamed_addr constant [3 x i8] c"TB\00", align 1
12+
13+
define void @CSMain() "hlsl.shader"="compute" {
14+
entry:
15+
16+
%TB = tail call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @TB.str)
17+
18+
ret void
19+
}
20+
21+
!dx.rootsignatures = !{!0}
22+
23+
!0 = !{ptr @CSMain, !1, i32 2}
24+
!1 = !{!2, !3, !5, !7}
25+
!2 = !{!"RootCBV", i32 0, i32 3, i32 1, i32 4}
26+
!3 = !{!"DescriptorTable", i32 0, !4}
27+
!4 = !{!"SRV", i32 1, i32 0, i32 0, i32 -1, i32 0}
28+
!5 = !{!"DescriptorTable", i32 0, !6}
29+
!6 = !{!"Sampler", i32 5, i32 3, i32 2, i32 -1, i32 0}
30+
!7 = !{!"DescriptorTable", i32 0, !8}
31+
!8 = !{!"UAV", i32 -1, i32 0, i32 0, i32 -1, i32 2}

llvm/test/CodeGen/DirectX/rootsignature-validation.ll

Lines changed: 6 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -43,30 +43,12 @@ declare target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx
4343
; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none)
4444
define void @CSMain() local_unnamed_addr #1 {
4545
entry:
46-
%CB.cb_h.i.i = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_4_0tt(i32 1, i32 3, i32 1, i32 0, i1 false, ptr nonnull @CB.str)
47-
store target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) %CB.cb_h.i.i, ptr @CB.cb, align 4
48-
%0 = tail call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
49-
%1 = tail call target("dx.RawBuffer", i32, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_1_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str.2)
50-
%2 = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 -2, i32 1, i32 0, i1 false, ptr nonnull @.str.4)
51-
%3 = tail call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 2, i32 1, i32 0, i1 false, ptr nonnull @.str.6)
52-
%4 = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 1, i32 1, i32 0, i1 false, ptr @.str.10)
53-
%5 = call { float, float, float, float } @llvm.dx.resource.load.cbufferrow.4.f32.f32.f32.f32.tdx.CBuffer_tdx.Layout_s___cblayout_CBs_4_0tt(target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) %CB.cb_h.i.i, i32 0)
54-
%6 = extractvalue { float, float, float, float } %5, 0
55-
%7 = call { i32, i1 } @llvm.dx.resource.load.rawbuffer.i32.tdx.RawBuffer_i32_0_0t(target("dx.RawBuffer", i32, 0, 0) %0, i32 0, i32 0)
56-
%8 = extractvalue { i32, i1 } %7, 0
57-
%conv.i = sitofp i32 %8 to float
58-
%add.i = fadd reassoc nnan ninf nsz arcp afn float %6, %conv.i
59-
%9 = call { float, i1 } @llvm.dx.resource.load.rawbuffer.f32.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %2, i32 0, i32 0)
60-
%10 = extractvalue { float, i1 } %9, 0
61-
%add2.i = fadd reassoc nnan ninf nsz arcp afn float %add.i, %10
62-
%11 = call { float, i1 } @llvm.dx.resource.load.rawbuffer.f32.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %3, i32 0, i32 0)
63-
%12 = extractvalue { float, i1 } %11, 0
64-
%add4.i = fadd reassoc nnan ninf nsz arcp afn float %add2.i, %12
65-
%13 = call { float, i1 } @llvm.dx.resource.load.rawbuffer.f32.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %4, i32 0, i32 0)
66-
%14 = extractvalue { float, i1 } %13, 0
67-
%add6.i = fadd reassoc nnan ninf nsz arcp afn float %add4.i, %14
68-
%conv7.i = fptosi float %add6.i to i32
69-
call void @llvm.dx.resource.store.rawbuffer.tdx.RawBuffer_i32_1_0t.i32(target("dx.RawBuffer", i32, 1, 0) %1, i32 0, i32 0, i32 %conv7.i)
46+
47+
%CB = tail call target("dx.CBuffer", target("dx.Layout", %__cblayout_CB, 4, 0)) @llvm.dx.resource.handlefrombinding(i32 1, i32 3, i32 1, i32 0, i1 false, ptr nonnull @CB.str)
48+
%Sampler = call target("dx.Sampler", 0) @llvm.dx.resource.handlefrombinding(i32 2, i32 3, i32 1, i32 0, i1 false, ptr nonnull @Smp.str)
49+
%SB = tail call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @SB.str)
50+
%RWB = tail call target("dx.RawBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @RWB.str)
51+
7052
ret void
7153
}
7254

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