Skip to content

Commit 5b5cac9

Browse files
committed
Dont use pointer to vector
Change-Id: I31be1d674baf42c5d5a909d603a4eca790bc145d
1 parent a66274c commit 5b5cac9

File tree

4 files changed

+17
-16
lines changed

4 files changed

+17
-16
lines changed

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2348,7 +2348,7 @@ class IGroupLPDAGMutation : public ScheduleDAGMutation {
23482348

23492349
ScheduleDAGMI *DAG;
23502350

2351-
std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations;
2351+
std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations;
23522352

23532353
// Organize lists of SchedGroups by their SyncID. SchedGroups /
23542354
// SCHED_GROUP_BARRIERs with different SyncIDs will have no edges added
@@ -2394,8 +2394,10 @@ class IGroupLPDAGMutation : public ScheduleDAGMutation {
23942394
IGroupLPDAGMutation() = default;
23952395
IGroupLPDAGMutation(
23962396
AMDGPU::SchedulingPhase Phase,
2397-
std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations)
2398-
: SavedMutations(SavedMutations), Phase(Phase) {}
2397+
std::vector<std::unique_ptr<ScheduleDAGMutation>> &CachedMutations)
2398+
: Phase(Phase) {
2399+
SavedMutations = std::move(CachedMutations);
2400+
}
23992401
};
24002402

24012403
unsigned SchedGroup::NumSchedGroups = 0;
@@ -2613,11 +2615,8 @@ void IGroupLPDAGMutation::apply(ScheduleDAGInstrs *DAGInstrs) {
26132615
return;
26142616
}
26152617

2616-
if (!SavedMutations)
2617-
return;
2618-
26192618
// We did not apply a mutation, fall back to SavedMutations
2620-
for (auto &m : *SavedMutations)
2619+
for (auto &m : SavedMutations)
26212620
m->apply(DAG);
26222621
}
26232622

@@ -2717,7 +2716,7 @@ namespace llvm {
27172716
/// for a given region.
27182717
std::unique_ptr<ScheduleDAGMutation> createIGroupLPDAGMutation(
27192718
AMDGPU::SchedulingPhase Phase,
2720-
std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations) {
2719+
std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations) {
27212720
return std::make_unique<IGroupLPDAGMutation>(Phase, SavedMutations);
27222721
}
27232722

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
1010
#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
1111

12+
#include "llvm/ADT/ArrayRef.h"
1213
#include "llvm/CodeGen/ScheduleDAGMutation.h"
1314
#include <memory>
1415
#include <vector>
@@ -22,7 +23,7 @@ enum class SchedulingPhase { Initial, PreRAReentry, PostRA };
2223

2324
std::unique_ptr<ScheduleDAGMutation> createIGroupLPDAGMutation(
2425
AMDGPU::SchedulingPhase Phase,
25-
std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations);
26+
std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations);
2627

2728
} // namespace llvm
2829

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -580,7 +580,7 @@ createGCNMaxOccupancyMachineScheduler(MachineSchedContext *C) {
580580
if (ST.shouldClusterStores())
581581
DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
582582
DAG->addMutation(
583-
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, nullptr));
583+
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, {}));
584584
DAG->addMutation(createAMDGPUMacroFusionDAGMutation());
585585
DAG->addMutation(createAMDGPUExportClusteringDAGMutation());
586586
return DAG;
@@ -591,7 +591,7 @@ createGCNMaxILPMachineScheduler(MachineSchedContext *C) {
591591
ScheduleDAGMILive *DAG =
592592
new GCNScheduleDAGMILive(C, std::make_unique<GCNMaxILPSchedStrategy>(C));
593593
DAG->addMutation(
594-
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, nullptr));
594+
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, {}));
595595
return DAG;
596596
}
597597

@@ -1099,7 +1099,8 @@ GCNTargetMachine::createPostMachineScheduler(MachineSchedContext *C) const {
10991099
DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
11001100
if (ST.shouldClusterStores())
11011101
DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
1102-
DAG->addMutation(createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA, nullptr));
1102+
DAG->addMutation(
1103+
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA, {}));
11031104
if ((EnableVOPD.getNumOccurrences() ||
11041105
getOptLevel() >= CodeGenOptLevel::Less) &&
11051106
EnableVOPD)

llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1048,8 +1048,8 @@ bool UnclusteredHighRPStage::initGCNSchedStage() {
10481048
return false;
10491049

10501050
SavedMutations.swap(DAG.Mutations);
1051-
DAG.addMutation(createIGroupLPDAGMutation(
1052-
AMDGPU::SchedulingPhase::PreRAReentry, nullptr));
1051+
DAG.addMutation(
1052+
createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PreRAReentry, {}));
10531053

10541054
InitialOccupancy = DAG.MinOccupancy;
10551055
// Aggressivly try to reduce register pressure in the unclustered high RP
@@ -1192,7 +1192,7 @@ bool GCNSchedStage::initGCNRegion() {
11921192
DAG.addMutation(createIGroupLPDAGMutation(
11931193
IsInitialStage ? AMDGPU::SchedulingPhase::Initial
11941194
: AMDGPU::SchedulingPhase::PreRAReentry,
1195-
&SavedMutations));
1195+
std::move(SavedMutations)));
11961196
}
11971197

11981198
return true;
@@ -2064,7 +2064,7 @@ void GCNPostScheduleDAGMILive::schedule() {
20642064
SavedMutations.clear();
20652065
SavedMutations.swap(Mutations);
20662066
addMutation(createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA,
2067-
&SavedMutations));
2067+
std::move(SavedMutations)));
20682068
}
20692069

20702070
ScheduleDAGMI::schedule();

0 commit comments

Comments
 (0)