Dont use pointer to vector

Change-Id: I31be1d674baf42c5d5a909d603a4eca790bc145d

Author: jrbyrnes

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

@@ -2348,7 +2348,7 @@ class IGroupLPDAGMutation : public ScheduleDAGMutation {
 
   ScheduleDAGMI *DAG;
 
-  std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations;
+  std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations;
 
   // Organize lists of SchedGroups by their SyncID. SchedGroups /
   // SCHED_GROUP_BARRIERs with different SyncIDs will have no edges added
@@ -2394,8 +2394,10 @@ class IGroupLPDAGMutation : public ScheduleDAGMutation {
   IGroupLPDAGMutation() = default;
   IGroupLPDAGMutation(
       AMDGPU::SchedulingPhase Phase,
-      std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations)
-      : SavedMutations(SavedMutations), Phase(Phase) {}
+      std::vector<std::unique_ptr<ScheduleDAGMutation>> &CachedMutations)
+      : Phase(Phase) {
+    SavedMutations = std::move(CachedMutations);
+  }
 };
 
 unsigned SchedGroup::NumSchedGroups = 0;
@@ -2613,11 +2615,8 @@ void IGroupLPDAGMutation::apply(ScheduleDAGInstrs *DAGInstrs) {
     return;
   }
 
-  if (!SavedMutations)
-    return;
-
   // We did not apply a mutation, fall back to SavedMutations
-  for (auto &m : *SavedMutations)
+  for (auto &m : SavedMutations)
     m->apply(DAG);
 }
 
@@ -2717,7 +2716,7 @@ namespace llvm {
 /// for a given region.
 std::unique_ptr<ScheduleDAGMutation> createIGroupLPDAGMutation(
     AMDGPU::SchedulingPhase Phase,
-    std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations) {
+    std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations) {
   return std::make_unique<IGroupLPDAGMutation>(Phase, SavedMutations);
 }
 

llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h

@@ -9,6 +9,7 @@
 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMFMAIGROUPLP_H
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/CodeGen/ScheduleDAGMutation.h"
 #include <memory>
 #include <vector>
@@ -22,7 +23,7 @@ enum class SchedulingPhase { Initial, PreRAReentry, PostRA };
 
 std::unique_ptr<ScheduleDAGMutation> createIGroupLPDAGMutation(
     AMDGPU::SchedulingPhase Phase,
-    std::vector<std::unique_ptr<ScheduleDAGMutation>> *SavedMutations);
+    std::vector<std::unique_ptr<ScheduleDAGMutation>> SavedMutations);
 
 } // namespace llvm
 

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -580,7 +580,7 @@ createGCNMaxOccupancyMachineScheduler(MachineSchedContext *C) {
   if (ST.shouldClusterStores())
     DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
   DAG->addMutation(
-      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, nullptr));
+      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, {}));
   DAG->addMutation(createAMDGPUMacroFusionDAGMutation());
   DAG->addMutation(createAMDGPUExportClusteringDAGMutation());
   return DAG;
@@ -591,7 +591,7 @@ createGCNMaxILPMachineScheduler(MachineSchedContext *C) {
   ScheduleDAGMILive *DAG =
       new GCNScheduleDAGMILive(C, std::make_unique<GCNMaxILPSchedStrategy>(C));
   DAG->addMutation(
-      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, nullptr));
+      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::Initial, {}));
   return DAG;
 }
 
@@ -1099,7 +1099,8 @@ GCNTargetMachine::createPostMachineScheduler(MachineSchedContext *C) const {
   DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
   if (ST.shouldClusterStores())
     DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
-  DAG->addMutation(createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA, nullptr));
+  DAG->addMutation(
+      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA, {}));
   if ((EnableVOPD.getNumOccurrences() ||
        getOptLevel() >= CodeGenOptLevel::Less) &&
       EnableVOPD)

llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

@@ -1048,8 +1048,8 @@ bool UnclusteredHighRPStage::initGCNSchedStage() {
     return false;
 
   SavedMutations.swap(DAG.Mutations);
-  DAG.addMutation(createIGroupLPDAGMutation(
-      AMDGPU::SchedulingPhase::PreRAReentry, nullptr));
+  DAG.addMutation(
+      createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PreRAReentry, {}));
 
   InitialOccupancy = DAG.MinOccupancy;
   // Aggressivly try to reduce register pressure in the unclustered high RP
@@ -1192,7 +1192,7 @@ bool GCNSchedStage::initGCNRegion() {
     DAG.addMutation(createIGroupLPDAGMutation(
         IsInitialStage ? AMDGPU::SchedulingPhase::Initial
                        : AMDGPU::SchedulingPhase::PreRAReentry,
-        &SavedMutations));
+        std::move(SavedMutations)));
   }
 
   return true;
@@ -2064,7 +2064,7 @@ void GCNPostScheduleDAGMILive::schedule() {
     SavedMutations.clear();
     SavedMutations.swap(Mutations);
     addMutation(createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA,
-                                          &SavedMutations));
+                                          std::move(SavedMutations)));
   }
 
   ScheduleDAGMI::schedule();