@@ -54,15 +54,15 @@ body: |
5454 ; CHECK-NEXT: successors: %bb.2(0x80000000)
5555 ; CHECK-NEXT: liveins: $x8
5656 ; CHECK-NEXT: {{ $}}
57- ; CHECK-NEXT: BL &__arm_tpidr2_restore , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $lr, implicit $sp
57+ ; CHECK-NEXT: BL &__arm_tpidr2_save , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $lr, implicit $sp
5858 ; CHECK-NEXT: MSR 56965, $xzr
5959 ; CHECK-NEXT: B %bb.2
6060 ; CHECK-NEXT: {{ $}}
6161 ; CHECK-NEXT: .2:
6262 ; CHECK-NEXT: RET undef $lr
6363 $x8 = MRS 56965, implicit-def $nzcv
6464
65- CommitZASavePseudo $x8, 0, &__arm_tpidr2_restore , csr_aarch64_sme_abi_support_routines_preservemost_from_x0
65+ CommitZASavePseudo $x8, 0, &__arm_tpidr2_save , csr_aarch64_sme_abi_support_routines_preservemost_from_x0
6666
6767 RET_ReallyLR
6868
@@ -85,7 +85,7 @@ body: |
8585 ; CHECK-NEXT: successors: %bb.2(0x80000000)
8686 ; CHECK-NEXT: liveins: $x8
8787 ; CHECK-NEXT: {{ $}}
88- ; CHECK-NEXT: BL &__arm_tpidr2_restore , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $lr, implicit $sp, implicit-def $zab0
88+ ; CHECK-NEXT: BL &__arm_tpidr2_save , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $lr, implicit $sp, implicit-def $zab0
8989 ; CHECK-NEXT: MSR 56965, $xzr
9090 ; CHECK-NEXT: ZERO_M 255, implicit-def $zab0
9191 ; CHECK-NEXT: B %bb.2
@@ -94,7 +94,7 @@ body: |
9494 ; CHECK-NEXT: RET undef $lr
9595 $x8 = MRS 56965, implicit-def $nzcv
9696
97- CommitZASavePseudo $x8, 1, &__arm_tpidr2_restore , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $zab0
97+ CommitZASavePseudo $x8, 1, &__arm_tpidr2_save , csr_aarch64_sme_abi_support_routines_preservemost_from_x0, implicit-def $zab0
9898
9999 RET_ReallyLR
100100
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