[UniformAnalysis] Changes based on feedback

Based on feedback, modifying early stop involving loops and minor lit test fix.

Author: jgu222

llvm/include/llvm/ADT/GenericUniformityImpl.h

@@ -630,6 +630,9 @@ template <typename ContextT> class DivergencePropagator {
     auto IsInIrreducibleCycle = [this](const BlockT *B) {
       for (const auto *Cycle = CI.getCycle(B); Cycle;
            Cycle = Cycle->getParentCycle()) {
+        // If everything is inside a reducible cycle, then look no further
+        if (Cycle->isReducible() && Cycle->contains(&DivTermBlock))
+          return false;
         if (!Cycle->isReducible())
           return true;
       }
@@ -638,12 +641,9 @@ template <typename ContextT> class DivergencePropagator {
 
     // Technically propagation can continue until it reaches the last node.
     //
-    // For efficiency, propagation can just stop at the IPD (immediate
-    // post-dominator) of successors(DivTemBlock) for any reducible graph.
-    // If FreshLabels.count()=1, the block in FreshLabels should be the IPD.
-    //
-    // For irreducible cycle, propagation continues until it reaches out of
-    // any irreducible cycles first, then stop when FreshLabels.count()=1.
+    // For efficiency, propagation can stop if FreshLabels.count()==1. But
+    // For irreducible cycles, let propagation continue until it reaches
+    // out of irreducible cycles (see code for details.)
     while (true) {
       auto BlockIdx = FreshLabels.find_last();
       if (BlockIdx == -1)

llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_branch.ll

@@ -1,4 +1,3 @@
-;
 ; RUN: opt -mtriple amdgcn-- -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
 ;
 ; This is to test an if-then-else case with some unmerged basic blocks
@@ -73,6 +72,4 @@ B8:
 }
 
 
-declare i32 @llvm.amdgcn.workitem.id.x() #0
-
-attributes #0 = {nounwind readnone }
+declare i32 @llvm.amdgcn.workitem.id.x()

llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_loop.ll

@@ -1,4 +1,3 @@
-;
 ; RUN: opt -mtriple amdgcn-- -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s
 ;
 ; This is to test a divergent phi involving loops
@@ -77,6 +76,4 @@ B8:
   ret void
 }
 
-declare i32 @llvm.amdgcn.workitem.id.x() #0
-
-attributes #0 = {nounwind readnone }
+declare i32 @llvm.amdgcn.workitem.id.x()